Prevent from dupliacation of generic/params if it shares same value

Nic30 / hwt

VHDL/Verilog/SystemC code generator, simulator API written in python/c++

MIT License

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Prevent from dupliacation of generic/params if it shares same value #28

Closed Nic30 closed 4 years ago

Nic30 commented 4 years ago

Currently all parameter on all sub-interfaces are present in target HDL. Problem is that it is too much lines of text which is usually completely useless.

Proposed solutions:

Remove generics/params entirely
or make them visible only on demand
or put generic/params with non unique values in to comments
or remove all interface generics/params and keep only g./p. from components

Nic30 commented 4 years ago

By default add only generics/params from Unit non recursively