Certain SPI flash chips -- for example, the National Semiconductor
NMC93C56 -- utilize a high CS for selection, whereas SPI.c is hardwired
for low CS.
While two workarounds are to use an inverter or ]0x00[ writes instead of
[0x00], it would be more consistent to offer an option for the idle CS state
during SPI mode setup.
Original issue reported on code.google.com by dan.be...@gmail.com on 8 Jul 2010 at 7:04
Original issue reported on code.google.com by
dan.be...@gmail.com
on 8 Jul 2010 at 7:04