search

NotBlackMagic / VUHFRadio

AX5043 Based USB Radio, dual band UHF and VHF
https://www.notblackmagic.com/projects/vuhf-radio/
28 stars 9 forks source link

Did you implement all modes present in the OnSemi driver? #3

Closed Hoel closed 2 years ago

Hoel commented 3 years ago

I want to set AX5243 in DBPSK 100bps at 868M on a 200KHz bandwidth and receive continuously, is it something possible with your implementation? Also, is there a way to set the preamble (19bit in my case)?

NotBlackMagic commented 3 years ago

So I implemented and tested the modes that are listed in the README. In theory it should be possible to do yes, 100bps BPSK, but has to be tested how well works with such a big bandwidth. Receive in continuous is also possible, I actually only use it that way (always on RX). Yes, that is possible, both for the RX preamble/pattern detection/matching as well as for transmission.

Hoel commented 3 years ago

Right, i use your DBPSK setting and adjusted it to my case, the communication with the AX5243 works, i can read the revision register and it is correct(0x51) however i am stuck on the PLL auto-ranging.

image

My test board has 26MHz TCXO, so i thought it could be the problem and set the center frequency to your setting (436450000 + 4300 in stead of 868130000) but no luck, it did not changed anything. Do you have an idea of what could be wrong? I use an STM32L476 rather than an STM32F103 but there is no difference

Than is my main, did i forget something?

void radioInit(){

    RadioInterfacesInit();
    RadioInitBaseConfiguration(RADIO_A);

    radioABaseConfigs.radio = RADIO_A;
    radioABaseConfigs.radioXTAL = RADIO_XTAL;
    radioABaseConfigs.radioCenterFrequencyMin = RADIO_A_FREQ_MIN;
    radioABaseConfigs.radioCenterFrequencyMax = RADIO_A_FREQ_MAX;

    radioAConfig = memoryChannelsFixed[Memory_BPSK_100];
    //radioAConfig.centerFrequency = 868130000 + 4300;
    radioAConfig.centerFrequency = 436450000 + 4300;
    RadioSetFullConfiguration(RADIO_A, radioAConfig);

}
int main(void){

  HAL_Init();
  SystemClock_Config();
  MX_GPIO_Init();
  MX_SPI1_Init();
  MX_USART2_UART_Init();
  radioInit();
  while (1){

  }
}

and that is my config 

{       //BPSK-100 Settings
        .operationMode = RadioMode_RX,
        .centerFrequency = 0,
        .modulation = RadioModulation_BPSK,
        .frequencyDeviation = 4800,
        .bandwidth = 200000,
        .ifFrequency = 9600,
        .rxDatarate = 100,
        .txDatarate = 100,
        .outputPower = 16,
        .afcRange = 4800,
        .agcSpeed = 4,

        .afskSpace = 2200,
        .afskMark = 1200,

        .tncMode = RadioTNCMode_OFF,
        .encoder = RadioEncoder_NRZI_S,
        .framing = RadioFraming_RAW,
        .crc = 0,
        .preambleSymbol = 0xAA,
        .preambleLength = 2
},
#define FXTAL                   26000000    //Xtal Frequency in Hz
#define RADIO_UHF_FREQ_MAX          437000000
#define RADIO_UHF_FREQ_MIN          435000000

Le 28 févr. 2021 à 22:12, Not Black Magic notifications@github.com a écrit :

So I implemented and tested the modes that are listed in the README. In theory it should be possible to do yes, 100bps BPSK, but has to be tested how well works with such a big bandwidth. Receive in continuous is also possible, I actually only use it that way (always on RX). Yes, that is possible, both for the RX preamble/pattern detection/matching as well as for transmission.

— You are receiving this because you authored the thread. Reply to this email directly, view it on GitHub https://github.com/NotBlackMagic/VUHFRadio/issues/3#issuecomment-787523988, or unsubscribe https://github.com/notifications/unsubscribe-auth/AAEYC25LCPCCVAFKGP33FC3TBKWVDANCNFSM4YFOUNYQ.

NotBlackMagic commented 3 years ago

This is due to wrong configurations of the clock/pll domain, you are using a very different clock reference frequency. In RadioInitBaseConfiguration() you have to change the //Set Synth part as well as the PERFTUNE53 register (change from 0x10 to 0x11). You can check my website (https://notblackmagic.com/bitsnpieces/ax5043/) for more details and maybe have to consult the programming manual as well.

Hoel commented 3 years ago

Oh, there was some hardcoded values here, i got it. I will try to fix it then. I generated a project with correct settings and crystal speed from the infamous AX-SEM 1990 software, so i will compare with these values.

Hoel commented 3 years ago

i wonder how you calculate this value : AX5043SynthSetFrequencyA(RADIO_A, 0x1B473334); //For 436.45MHz is 0x1B473334 calculated but calibrated value is 0x1B474335 Because 0x1B474335 is not equal to 436450000

NotBlackMagic commented 3 years ago

This is documented in the function: frequency: Frequency A = fCarrier/FXtal * 2^24 + 1/2 Again, you can check the website for more detailed information and explanations for configurations. Your FXTAL frequency will also be 26MHz/2 as the maximum allowed FXTAL is 24.8 MHz and which is also why the PERFTUNE53 register has to be changed.

Hoel commented 3 years ago

ok thank you. I changed PERFTUNE52 to enable RDIV, set XTAL to 13000000, kept VCO1 and SetFrequencyA as is (since i kept your carrier frequency) but still no luck.

That is my generated config, some registers that you set are not even present in the genreated config.

    //  <REGISTER name="AX5043_REG_0xF00" addr="0x2F00" value="0x0F" xpertvalue="0x0F" mask="0xFF" usexpertvalue="0x00"/>
    //  <REGISTER name="AX5043_REG_0xF18" addr="0x2F18" value="0x06" xpertvalue="0x06" mask="0xFF" usexpertvalue="0x00"/>

    //  <REGISTER name="AX5043_REG_0xF1C" addr="0xF1C" value="0x07" xpertvalue="0x07" mask="0xFF" usexpertvalue="0x00"/>
    //  <REGISTER name="AX5043_REG_0xF21" addr="0xF21" value="0x68" xpertvalue="0x68" mask="0xFF" usexpertvalue="0x00"/>
    //  <REGISTER name="AX5043_REG_0xF22" addr="0xF22" value="0xFF" xpertvalue="0xFF" mask="0xFF" usexpertvalue="0x00"/>
    //  <REGISTER name="AX5043_REG_0xF23" addr="0xF23" value="0x84" xpertvalue="0x84" mask="0xFF" usexpertvalue="0x00"/>
    //  <REGISTER name="AX5043_REG_0xF26" addr="0xF26" value="0x98" xpertvalue="0x98" mask="0xFF" usexpertvalue="0x00"/>
    //  <REGISTER name="AX5043_REG_0xF34" addr="0xF34" value="0x08" xpertvalue="0x08" mask="0x0F" usexpertvalue="0x00"/>
    //  <REGISTER name="AX5043_REG_0xF35" addr="0xF35" value="0x11" xpertvalue="0x11" mask="0x03" usexpertvalue="0x00"/>
    //  <REGISTER name="AX5043_REG_0xF44" addr="0xF44" value="0x25" xpertvalue="0x25" mask="0xFF" usexpertvalue="0x00"/>
<?xml version="1.0"?>
<AXRadioLabState>
<RADIOLABVERSION rlversion="AX-RadioLab v2.8" rlversionmin="e"/>
<iv>0</iv>
<REGISTERS>
<REGISTER name="AX5043_REG_MODULATION" addr="0x010" value="0x04" xpertvalue="0x04" mask="0x1F" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_ENCODING" addr="0x011" value="0x02" xpertvalue="0x02" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FRAMING" addr="0x012" value="0x26" xpertvalue="0x26" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PINFUNCSYSCLK" addr="0x021" value="0x01" xpertvalue="0x01" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PINFUNCDCLK" addr="0x022" value="0x01" xpertvalue="0x01" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PINFUNCDATA" addr="0x023" value="0x01" xpertvalue="0x01" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PINFUNCANTSEL" addr="0x025" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PINFUNCPWRAMP" addr="0x026" value="0x07" xpertvalue="0x07" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_WAKEUPXOEARLY" addr="0x06E" value="0x01" xpertvalue="0x01" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_IFFREQ1" addr="0x100" value="0x16" xpertvalue="0x16" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_IFFREQ0" addr="0x101" value="0x82" xpertvalue="0x82" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_DECIMATION" addr="0x102" value="0x01" xpertvalue="0x01" mask="0x7F" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_RXDATARATE2" addr="0x103" value="0x0F" xpertvalue="0x0F" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_RXDATARATE1" addr="0x104" value="0xFF" xpertvalue="0xFF" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_RXDATARATE0" addr="0x105" value="0xFF" xpertvalue="0xFF" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_MAXDROFFSET2" addr="0x106" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_MAXDROFFSET1" addr="0x107" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_MAXDROFFSET0" addr="0x108" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_MAXRFOFFSET2" addr="0x109" value="0x80" xpertvalue="0x80" mask="0x8F" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_MAXRFOFFSET1" addr="0x10A" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_MAXRFOFFSET0" addr="0x10B" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_AMPLFILTER" addr="0x115" value="0x00" xpertvalue="0x00" mask="0x0F" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_RXPARAMSETS" addr="0x117" value="0xF4" xpertvalue="0xF4" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_AGCGAIN0" addr="0x120" value="0xEB" xpertvalue="0xEB" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_AGCTARGET0" addr="0x121" value="0x84" xpertvalue="0x84" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_TIMEGAIN0" addr="0x124" value="0x8F" xpertvalue="0x8F" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_DRGAIN0" addr="0x125" value="0x89" xpertvalue="0x89" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PHASEGAIN0" addr="0x126" value="0xC3" xpertvalue="0xC3" mask="0xCF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FREQUENCYGAINA0" addr="0x127" value="0x46" xpertvalue="0x46" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FREQUENCYGAINB0" addr="0x128" value="0x0A" xpertvalue="0x0A" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FREQUENCYGAINC0" addr="0x129" value="0x1F" xpertvalue="0x1F" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FREQUENCYGAIND0" addr="0x12A" value="0x1F" xpertvalue="0x1F" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_AMPLITUDEGAIN0" addr="0x12B" value="0x06" xpertvalue="0x06" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FREQDEV10" addr="0x12C" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FREQDEV00" addr="0x12D" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_BBOFFSRES0" addr="0x12F" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_AGCGAIN1" addr="0x130" value="0xEB" xpertvalue="0xEB" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_AGCTARGET1" addr="0x131" value="0x84" xpertvalue="0x84" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_AGCAHYST1" addr="0x132" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_AGCMINMAX1" addr="0x133" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_TIMEGAIN1" addr="0x134" value="0x8D" xpertvalue="0x8D" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_DRGAIN1" addr="0x135" value="0x88" xpertvalue="0x88" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PHASEGAIN1" addr="0x136" value="0xC3" xpertvalue="0xC3" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FREQUENCYGAINA1" addr="0x137" value="0x46" xpertvalue="0x46" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FREQUENCYGAINB1" addr="0x138" value="0x0A" xpertvalue="0x0A" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FREQUENCYGAINC1" addr="0x139" value="0x1F" xpertvalue="0x1F" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FREQUENCYGAIND1" addr="0x13A" value="0x1F" xpertvalue="0x1F" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_AMPLITUDEGAIN1" addr="0x13B" value="0x06" xpertvalue="0x06" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FREQDEV11" addr="0x13C" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FREQDEV01" addr="0x13D" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FOURFSK1" addr="0x13E" value="0x16" xpertvalue="0x16" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_BBOFFSRES1" addr="0x13F" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_AGCGAIN3" addr="0x150" value="0xFF" xpertvalue="0xFF" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_AGCTARGET3" addr="0x151" value="0x84" xpertvalue="0x84" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_AGCAHYST3" addr="0x152" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_AGCMINMAX3" addr="0x153" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_TIMEGAIN3" addr="0x154" value="0x8C" xpertvalue="0x8C" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_DRGAIN3" addr="0x155" value="0x87" xpertvalue="0x87" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PHASEGAIN3" addr="0x156" value="0xC3" xpertvalue="0xC3" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FREQUENCYGAINA3" addr="0x157" value="0x46" xpertvalue="0x46" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FREQUENCYGAINB3" addr="0x158" value="0x0A" xpertvalue="0x0A" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FREQUENCYGAINC3" addr="0x159" value="0x1F" xpertvalue="0x1F" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FREQUENCYGAIND3" addr="0x15A" value="0x1F" xpertvalue="0x1F" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_AMPLITUDEGAIN3" addr="0x15B" value="0x06" xpertvalue="0x06" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FREQDEV13" addr="0x15C" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FREQDEV03" addr="0x15D" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FOURFSK3" addr="0x15E" value="0x16" xpertvalue="0x16" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_BBOFFSRES3" addr="0x15F" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FSKDEV2" addr="0x161" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FSKDEV1" addr="0x162" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_FSKDEV0" addr="0x163" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_MODCFGA" addr="0x164" value="0x05" xpertvalue="0x05" mask="0xC7" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_TXRATE2" addr="0x165" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_TXRATE1" addr="0x166" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_TXRATE0" addr="0x167" value="0x41" xpertvalue="0x41" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_TXPWRCOEFFB1" addr="0x16A" value="0x0F" xpertvalue="0x0F" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_TXPWRCOEFFB0" addr="0x16B" value="0xFF" xpertvalue="0xFF" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PLLVCOI" addr="0x180" value="0x99" xpertvalue="0x99" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PLLRNGCLK" addr="0x183" value="0x04" xpertvalue="0x04" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_BBTUNE" addr="0x188" value="0x01" xpertvalue="0x01" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_BBOFFSCAP" addr="0x189" value="0x77" xpertvalue="0x77" mask="0x77" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PKTADDRCFG" addr="0x200" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PKTLENCFG" addr="0x201" value="0x80" xpertvalue="0x80" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PKTLENOFFSET" addr="0x202" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PKTMAXLEN" addr="0x203" value="0xC8" xpertvalue="0xC8" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_MATCH0PAT3" addr="0x210" value="0xAA" xpertvalue="0xAA" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_MATCH0PAT2" addr="0x211" value="0xCC" xpertvalue="0xCC" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_MATCH0PAT1" addr="0x212" value="0xAA" xpertvalue="0xAA" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_MATCH0PAT0" addr="0x213" value="0xCC" xpertvalue="0xCC" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_MATCH0LEN" addr="0x214" value="0x1F" xpertvalue="0x1F" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_MATCH0MAX" addr="0x216" value="0x1F" xpertvalue="0x1F" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_MATCH1PAT1" addr="0x218" value="0x55" xpertvalue="0x55" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_MATCH1PAT0" addr="0x219" value="0x55" xpertvalue="0x55" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_MATCH1LEN" addr="0x21C" value="0x8A" xpertvalue="0x8A" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_MATCH1MAX" addr="0x21E" value="0x0A" xpertvalue="0x0A" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_TMGTXBOOST" addr="0x220" value="0x3E" xpertvalue="0x3E" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_TMGTXSETTLE" addr="0x221" value="0x31" xpertvalue="0x31" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_TMGRXBOOST" addr="0x223" value="0x3E" xpertvalue="0x3E" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_TMGRXSETTLE" addr="0x224" value="0x31" xpertvalue="0x31" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_TMGRXOFFSACQ" addr="0x225" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_TMGRXCOARSEAGC" addr="0x226" value="0x7F" xpertvalue="0x7F" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_TMGRXRSSI" addr="0x228" value="0x03" xpertvalue="0x03" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_TMGRXPREAMBLE2" addr="0x22A" value="0x35" xpertvalue="0x35" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_RSSIABSTHR" addr="0x22D" value="0xEB" xpertvalue="0xEB" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_BGNDRSSITHR" addr="0x22F" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PKTCHUNKSIZE" addr="0x230" value="0x0D" xpertvalue="0x0D" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PKTACCEPTFLAGS" addr="0x233" value="0x20" xpertvalue="0x20" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_DACVALUE1" addr="0x330" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_DACVALUE0" addr="0x331" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_DACCONFIG" addr="0x332" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_REF" addr="0xF0D" value="0x03" xpertvalue="0x03" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_XTALOSC" addr="0xF10" value="0x04" xpertvalue="0x04" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_XTALAMPL" addr="0xF11" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_0xF1C" addr="0xF1C" value="0x07" xpertvalue="0x07" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_0xF21" addr="0xF21" value="0x68" xpertvalue="0x68" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_0xF22" addr="0xF22" value="0xFF" xpertvalue="0xFF" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_0xF23" addr="0xF23" value="0x84" xpertvalue="0x84" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_0xF26" addr="0xF26" value="0x98" xpertvalue="0x98" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_0xF34" addr="0xF34" value="0x08" xpertvalue="0x08" mask="0x0F" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_0xF35" addr="0xF35" value="0x11" xpertvalue="0x11" mask="0x03" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_0xF44" addr="0xF44" value="0x25" xpertvalue="0x25" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_MODCFGP" addr="0xF5F" value="0xE1" xpertvalue="0xE1" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PLLLOOP" addr="0x1030" value="0x09" xpertvalue="0x09" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PLLCPI" addr="0x1031" value="0x02" xpertvalue="0x02" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PLLVCODIV" addr="0x1032" value="0x20" xpertvalue="0x20" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_XTALCAP" addr="0x1184" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_0xF00" addr="0x1F00" value="0x0F" xpertvalue="0x0F" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_0xF18" addr="0x1F18" value="0x06" xpertvalue="0x06" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PLLLOOP" addr="0x2030" value="0x09" xpertvalue="0x09" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PLLCPI" addr="0x2031" value="0x01" xpertvalue="0x01" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PLLVCODIV" addr="0x2032" value="0x20" xpertvalue="0x20" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_XTALCAP" addr="0x2184" value="0x00" xpertvalue="0x00" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_0xF00" addr="0x2F00" value="0x0F" xpertvalue="0x0F" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_0xF18" addr="0x2F18" value="0x06" xpertvalue="0x06" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_TMGRXAGC_(WOR)" addr="0x3000" value="0x90" xpertvalue="0x90" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_TMGRXPREAMBLE1_(WOR)" addr="0x3001" value="0x19" xpertvalue="0x19" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_PKTMISCFLAGS_(WOR)" addr="0x3002" value="0x03" xpertvalue="0x03" mask="0xFF" usexpertvalue="0x00"/>
<REGISTER name="AX5043_REG_RSSIREFERENCE*" addr="0x3006" value="0x05" xpertvalue="0x05" mask="0xFF" usexpertvalue="0x00"/>
</REGISTERS>
<MODE>
<txmode>2</txmode>
<rxmode>0</rxmode>
<packetgap>4740.000000</packetgap>
<worper>200</worper>
<ack>0</ack>
<ack_nr_retx>0</ack_nr_retx>
</MODE>
<RXSTARTUP>
<RSSIABSTHR>0xAB</RSSIABSTHR>
<BGNDRSSITHR>0x00</BGNDRSSITHR>
<compute_bgndrssi>0</compute_bgndrssi>
</RXSTARTUP>
<KITCONFIG>
<devicetype>1</devicetype>
<kittype_0>3</kittype_0>
<debuggertype>0</debuggertype>
<compilertype>2</compilertype>
<use_lcd_0>0</use_lcd_0>
<use_dbglink_0>0</use_dbglink_0>
<use_com0_0>0</use_com0_0>
<dbgmsg_0>0</dbgmsg_0>
<mcusleep_0>1</mcusleep_0>
</KITCONFIG>
<PINCONFIG>
<refosc>0x01</refosc>
<vcocal>0x01</vcocal>
<pa>0x01</pa>
<lf>0x00</lf>
<vcomode>0x00</vcomode>
<pinfuncantsel>0x00</pinfuncantsel>
<pinfuncpwramp>0x07</pinfuncpwramp>
<pinfuncirq>0x03</pinfuncirq>
<pinfuncsysclk>0x01</pinfuncsysclk>
<pinfuncdclk>0x01</pinfuncdclk>
<pinfuncdata>0x01</pinfuncdata>
<dacconfig>0x0</dacconfig>
<dacvalue>0x0</dacvalue>
</PINCONFIG>
<PHY>
<fcarrier>868130000.000000</fcarrier>
<rfdiv>0</rfdiv>
<manual_vcoi>0x00</manual_vcoi>
<vcoi>0x19</vcoi>
<cpi_tx>0x02</cpi_tx>
<cpi_rx>0x01</cpi_rx>
<filt_tx>0x09</filt_tx>
<filt_rx>0x09</filt_rx>
<afsk_mark>1200.000000</afsk_mark>
<afsk_space>2200.000000</afsk_space>
<fxtal>26000000.000000</fxtal>
<maxafc_outer>0.000000</maxafc_outer>
<br>100.000000</br>
<chbw>300000.000000</chbw>
<modulation>0x05</modulation>
<modh>0.000000</modh>
<halfdev>0.000000</halfdev>
<txpwr>15.000000</txpwr>
<bw>200000.000000</bw>
<encoding>0x02</encoding>
<xtalcap>0x00</xtalcap>
<adcclkdiv>0x03</adcclkdiv>
<nrchannels>1</nrchannels>
<acq_channelstate>0</acq_channelstate>
<channelstate_per>10</channelstate_per>
<fec>0</fec>
<chanbusythr>-85</chanbusythr>
<lbt_retries>0</lbt_retries>
<lbt_forcetx>0</lbt_forcetx>
<manualfif>0</manualfif>
<fif>71440.000000</fif>
</PHY>
<FRAMING>
<preamble_len>19</preamble_len>
<preamble_char>0xAA</preamble_char>
<preamble_unenc>1</preamble_unenc>
<preamble_appendbits>0</preamble_appendbits>
<preamble_appendpattern>0x00</preamble_appendpattern>
<wakeup_preamble_len>240</wakeup_preamble_len>
<sync_unenc>0</sync_unenc>
<framing_mode>0x03</framing_mode>
<syncword_len>32</syncword_len>
<syncword>0x33553355</syncword>
<len_byte_enabled>1</len_byte_enabled>
<lenpos>0x00</lenpos>
<lenbits>0x08</lenbits>
<lenoffs>0x00</lenoffs>
<pktmaxlen>0xC8</pktmaxlen>
<addrlen>0x00</addrlen>
<addrpos>0x00</addrpos>
<master_addr>0x3432</master_addr>
<slave_addr>0x3433</slave_addr>
<addr_mask>0x0</addr_mask>
<sfdcallback>0</sfdcallback>
<msb_first>0</msb_first>
<crc_skip_first>0</crc_skip_first>
<crcmode>0x2</crcmode>
<crcinit>0xFFFFFFFF</crcinit>
<pktacceptflags>0x20</pktacceptflags>
<insert_counter>1</insert_counter>
<counter_pos>0</counter_pos>
<maclen>3</maclen>
<use_ackcounter>0</use_ackcounter>
<ackcounterpos>0</ackcounterpos>
<senderaddrpos>0</senderaddrpos>
<tx_senderaddr>0</tx_senderaddr>
<pktdata>00_00_55_66_77_88</pktdata>
</FRAMING>
<SYNCTIMING>
<LPOSCFREQUENCY>32768.000000</LPOSCFREQUENCY>
<LPOSCPPM>200.000000</LPOSCPPM>
<POWERUPDELAY>3.000000</POWERUPDELAY>
<RESYNCTIMEOUTPU>180.000000</RESYNCTIMEOUTPU>
<RESYNCNLOST>10</RESYNCNLOST>
<RESYNCTIMEOUT>3</RESYNCTIMEOUT>
<RESYNCPAUSE>600.000000</RESYNCPAUSE>
<RADIOXTALPRESTART>0.001495</RADIOXTALPRESTART>
<RXMARGIN>0.030151</RXMARGIN>
<RXMARGINRESYNC>0.030609</RXMARGINRESYNC>
</SYNCTIMING>
<VCOCAL>
<MINFREQ>1</MINFREQ>
<MAXFREQ>0</MAXFREQ>
<RANGEBORDERPOLY>0 0 0</RANGEBORDERPOLY>
<VCOIPOLY0>0 0</VCOIPOLY0>
<VCOIPOLY1>0 0</VCOIPOLY1>
<VCOIPOLY2>0 0</VCOIPOLY2>
<VCOIPOLY3>0 0</VCOIPOLY3>
<VCOIPOLY4>0 0</VCOIPOLY4>
<VCOIPOLY5>0 0</VCOIPOLY5>
<VCOIPOLY6>0 0</VCOIPOLY6>
<VCOIPOLY7>0 0</VCOIPOLY7>
<VCOIPOLY8>0 0</VCOIPOLY8>
<VCOIPOLY9>0 0</VCOIPOLY9>
<VCOIPOLY10>0 0</VCOIPOLY10>
<VCOIPOLY11>0 0</VCOIPOLY11>
<VCOIPOLY12>0 0</VCOIPOLY12>
<VCOIPOLY13>0 0</VCOIPOLY13>
<VCOIPOLY14>0 0</VCOIPOLY14>
<VCOIPOLY15>0 0</VCOIPOLY15>
</VCOCAL>
</AXRadioLabState>
NotBlackMagic commented 3 years ago

You have to change the value in AX5043SynthSetFrequencyA(RADIO_A, 0x1B473334); as here this is a hard calculated value based on a FXTAL of 16MHz. Where does your code get stuck? Have you checked that you have the correct clock shape at the clock input of the IC, correct circuit for a CMOS or clipped sine wave TCXO?

Hoel commented 3 years ago

Oh yes, i am stupid, i let your hardcoded value for SynthSetFrequencyA, of course, i need to fix that. For the TCXO I have a CMOS and it has the correct implementation in HW. It gets stuck at
while(AX5043SynthGetAutoRangingA(radio));

Hoel commented 3 years ago

i cannot get your value when i try with 16000000 XTAL 

#define fCarrier  436450000
#define FXtal      16000000
int main()
{
    unsigned long f = (unsigned long)((fCarrier/FXtal * 16777216 + 1/2));
    printf("%lu \n0x%04x",f);
    return 0;
}
452984832                                                                                                                                                                                                                       
0x5ed90d58

it should be 0x1B474335

Hoel commented 3 years ago

anyway i figured the value for 26M TCXO and 436.45M carrier is 0x2192B52B //436450000/13000000*0x1000000+1/2=563262763.823 0x2192B52B Also changed PERFTUNE52 to 0x08 as per the config file generated by radiolab. But still stuck on the auto-ranging loop

NotBlackMagic commented 3 years ago

You have to read the programming manual to configure the Clock domain correctly for your TCXO. The problem is not with setting the RF frequency (SynthSetFrequencyA) as if that's wrong it doesn't hang on while(AX5043SynthGetAutoRangingA(radio));. It passes and rises an error bit (RNGERR) in the PLLRANGINGA register. It has to be a wrong configuration for this TCXO frequency, or that the clock is not correct at the IC input. https://www.onsemi.cn/pub/Collateral/AND9317-D.PDF

Hoel commented 3 years ago

i checked the registers related to TCXO 

    data = 0x04; AX5043WriteLongAddress(radio, PERFTUNE16, &data, 1);   //OK F10: XTALOSC
    data = 0x00; AX5043WriteLongAddress(radio, PERFTUNE17, &data, 1);   //OK F11: XTALAMPL
    data = 0x00; AX5043WriteLongAddress(radio, 0x184, &data, 1);    //OK  XTALCAP

and they are all conform. I dont know which registers are related to the TCXO frequency though. I checked with scope at the P input pin of the AX5243 (behind the cap) it is a perfect 26MHz with 600mV peak to peak.

Hoel commented 3 years ago

OK, finally i found the (very silly) mistake. I wired both TCXO-EN pin of the AX5243 and TCXO-P (power) pin of the TCXO to the MCU, and in fact since the beginning i was feeding TCXO-EN instead of feeding TCXO-P... yeah, that was very stupid. Now the PLL auto-ranging passes and i can finally start with actual packet reception.

NotBlackMagic commented 3 years ago

Hardware errors are always annoying and always happen... But good news that after fixing that it passes the auto-ranging! Good luck with the rest now

Hoel commented 3 years ago

Yes it passes the ranging perfectly now. At this stage my goal is simply to know when a frame is received, here is what i did : 

int main(void){

    HAL_Init();
    SystemClock_Config();
    MX_GPIO_Init();
    MX_SPI1_Init();
    MX_USART2_UART_Init();
    radioInit();
    RadioUHFEnterRX();
    IrqMask irqMask;
    irqMask.raw = 0x0000;
    irqMask.irqmfifonotempty = 1;
    AX5043IrqEnableIRQs(0, irqMask);

    while (1) {
        //printf("%d\n",AX5043RXTrackingAmplitude(0));
        //printf("%d\n",AX5043RXTrackingPhase(0));
        //printf("%d\n",AX5043RXTrackingDatarate(0));
        //printf("%d\n",AX5043GeneralGetRSSI(0));
        if (AX5043IrqGetIRQRequest(0).irqrqfifonotempty) {
            printf("->>FIFO\n");
        }
    }
}

Sadly i never get anything, despite the transmitter is just at 0.5m and transmitting continuously. I actually have two transmitter, one that is doing channel hopping as it should, and another that is set on fixed carrier at 868.13 and also continuously, i tested with both (not at the same time of course) and never got anything triggered.

I suspected the problem came from my preamble configuration, my actual preamble is 19bit long 0X55, so 1010101010101010101, i have seen in the programming manual that the preamble should be set MSB if shorter than a given length, which is my case, so i assume the registers should be set to 0xAA instead of 0x55, which the axsem software did. But no matter what i try, i never get any frame, nor any change in amplitude, phase or RSSI.

    radio_write8(AX5043_REG_PKTLENCFG,           0x80);
    radio_write8(AX5043_REG_PKTLENOFFSET,        0x00);
    radio_write8(AX5043_REG_PKTMAXLEN,           0xC8);
    radio_write8(AX5043_REG_MATCH0PAT3,          0xAA);
    radio_write8(AX5043_REG_MATCH0PAT2,          0xCC);
    radio_write8(AX5043_REG_MATCH0PAT1,          0xAA);
    radio_write8(AX5043_REG_MATCH0PAT0,          0xCC);
    radio_write8(AX5043_REG_MATCH0LEN,           0x1F);
    radio_write8(AX5043_REG_MATCH0MAX,           0x1F);

    radio_write8(AX5043_REG_MATCH1PAT1,          0xAA);
    radio_write8(AX5043_REG_MATCH1PAT0,          0xAA);
    radio_write8(AX5043_REG_MATCH1LEN,           0x8A);
    radio_write8(AX5043_REG_MATCH1MAX,           0x0A);

Do you know if i should set anything else beside preamble? i assumed the preamble should be enough to get an interrupt at least.

NotBlackMagic commented 3 years ago

Are you sure the receiver got a lock after the auto-ranging? Did you check the error bit? Also as a first step I would only monitor the RSSI and see if it changes with the transmitter ON/OFF as this does not require any packet configurations yet. Anything after that are configurations for your needed modulation and framing/packaging so there I can´t really help.

Hoel commented 3 years ago

Yes it does not return error bit after auto-ranging.

Also as a first step I would only monitor the RSSI and see if it changes with the transmitter ON/OFF So the RSSI is basically the amplitude at the ADC regardless of the packet configuration, that is good to know. i will test with a carrier wave on the vector signal generator then. And swipe from 400 to 900M just to confirm that the AX5243 is actually tuned to 868.13M.

One detail unclearr to me yet : you mentioned i should set XTAL to actual TCXO freq/2 in your library, so 13000000, because of the PERFTUNE53 register which is set when TCXO is >24M. Is that correct or should i still set XTAL define to actual freq 26000000?

Hoel commented 3 years ago

OK, so the actual tunning is 589.077MHz, i can clearly see it on the RSSI, which stays at -128 otherwise and jump to -60 when i set the VSG to 589.077MHz. Now i have to figure what is wrong

Hoel commented 3 years ago

with the firmware i built from ax-radiolab registers the center frequency is correct, to 868.13M and i can see the RSSI go to 0 when there is a carrier wave nearby, so the problem only occurs in your firmware for some reason, the center frequency is 279.053MHz off. Now i have to figure how to get the premble right, also i suspect the FIFO NOT EMPTY interrupt will not be triggered with only the preamble right, it may be the problem, maybe the other frame settings should be correct too.

NotBlackMagic commented 3 years ago

The problem with the wrong center frequency is due to the use of XTALDIV (PERFTUNE53). Everywhere in the library where calculations are made to get the register values to program, I always used as if XTALDIV is 1 so all those will be wrong. I think setting XTAL to 13000000 should fix it, not sure though. You can define how/when data is written to the FIFO, but the simplest is to configure both the DATA and DCLK pins and monitor them to see what are the received and decoded bits are.

Hoel commented 3 years ago

that is what i suspected, i will chase the hardcoded values related to XTALDIV.

You can define how/when data is written to the FIFO, but the simplest is to configure both the DATA and DCLK pins and monitor them to see what are the received and decoded bits are. I use the AX5243, which does not have DATA/CLOCK and the other auxiliary GPIOs, so i can only use registers.

After using some of your functions to set preamble characteristic and also accept all packets i am getting somewhere, even if the datas are not the actual packets sent but more random noise or other stuffs in the air.

void test_radio(){

    ax5043_rst();
    printf("Rev: 0x%02x\n",ax5043_readRev());
    printf("AX5243 registers init\n");
    setRxMode();
    printf("PLL auto-ranging\n");
    if (ax5043_pll_ranging()) printf("PLL ranging failed\n");
    else printf("PLL ranging success\n");

    //AX5043PacketSetAcceptPacketsAborted(1);
    AX5043PacketSetAcceptPacketsCRCFailed(1);
    //AX5043PacketSetAcceptPacketsResidual(1);
    //AX5043PacketSetAcceptPacketsAddressFailed(1);
    AX5043PacketSetAcceptPacketsOverSize(1);

    AX5043PacketSetPaternMatch0(0xAAAAA);
    AX5043PacketSetPaternMatch0Min(9);
    AX5043PacketSetPaternMatch0Max(19);
    AX5043PacketSetPaternLength0(19);

    printf("Continuous RX mode\n");
    ax5043_receiver_on_continuous();
    printf("IRQ polling\n");

    while(1) {
        //printf("%d\n",AX5043GeneralGetRSSI());
        //printf("f %d\n",AX5043RXTrackingGetRFFrequency());
        //printf("Rate %d\n",AX5043RXTrackingDatarate());
        //printf("Ph %d\n",AX5043RXTrackingPhase());
        //printf("Amp %d\n",AX5043RXTrackingAmplitude());
        if(ax5043_get_register(AX5043_IRQREQUEST0) & 0x01) {
            ax5043_receive_isr();
            pkts_received++;
            display_packet();
            continue;
        }
    }
}

image

Hoel commented 3 years ago

It seems that the problem is not preamble detection but actually the frequency tracking (i think).

Previously i was sending packets with TX hopping to random channels in the 200KHz span, suddently i realized that the problem could be related. So i set the vector signal generator to BPSK and entered an arbitrary pattern matching the preamble, this specific VSG (R&S SMJ100A) cannot go under 400bps i had to disable the differential coding and enter each bit 4 times.

Then i set the PaternMatch1 to 0x55 on the AX5243, length to 15 bit (because 60 bits is the maximum the SMJ100A allows in arbitrary bit pattern mode). Finally i observed the RadioState register in a loop and noticed each time the VSG is ON the state changes from 0X0D to 0X0C, which i assume is the internal state-machine value for preamble detection, so i did :

if(AX5043GeneralRadioState()==0x0C){
        printf("Preamble detected %d\n",AX5043GeneralGetRSSI());
        while(AX5043GeneralRadioState()==0x0C);//preamble detected state
}

And sure enough, each time i set the VSG ON the preamble is immediately detected.

However the joy was short : as soon as the VSG frequency was modified to verify that the 200KHz span of RXBW was covered, the preamble detection stopped right away, even on a very small change of ±1KHz prevent the AX5243 to detect preamble.

So at first i thought the problem could be the AFC range, which is one of the parameters in AX-Radiolab, however i quickly realized that in AX-Radiolab this parameters is disabled as soon as the PSK modulation is selected (and the TCXO precision label goes automatically to 0.01 ppm which is certainly not a realistic value), i dont really understand why we cannot set the AFC when in PSK mode, and now i am not sure how i should do to actually use the 200KHZ RXBW. Any aidea on what to try?

NotBlackMagic commented 3 years ago

You are correct in that RadioState shows preamble detection, if you check the programming manual you can see that to. But did you try setting the AFC range? I have not actually tested if it works or not in BPSK mode.

Hoel commented 3 years ago

well, since it goes disabled in ax-radiolab as soon as i set PSK modulation i assumed it cannot be used, but you are right, i am going to try setting it anyway now

NotBlackMagic commented 3 years ago

So I checked, and it is not disabled per si, it gets looked to the symbol rate (1/4 of it). Also the TCXO precision is a "recommendation" based on the used AFC range.

Hoel commented 3 years ago

i tried, 

//Set RX AFC Range
AX5043RXParamSetCorrectFrequencyOffsetLO(1);
uint32_t afc = (uint32_t)((20 * (16777216.f / 26000000.f)) + 0.5f);
AX5043RXParamSetRXMaximumFrequencyOffset(afc);

But even a shift of 1KHz prevented preamble detection despite i set AFC span to 20KHz.

NotBlackMagic commented 3 years ago

You set it to 20Hz not 20kHz. Are you using a continuous transmission always on the same frequency? It is possible that with how the PSK decoding is implemented, the AFC is effectively useless, but I have not found anything about that yet.

Hoel commented 3 years ago

AH, i see, it is in Hz. Since then i discoeverd something rather sad, what i thought to be preamble detection was in fact carrier wave presence detection, in fact at one point i disabled the modulation on the VSG and sadly the test loop checking on AX5043GeneralRadioState()==0x0C continued to work the same. So the issue with preamble detection is still not solved, i dont understand what i can be missing, I have tried so many things to detect the preamble and nothing worked, this transceiver is very powerfull but really a nightmare to configure.

Anyway i will try to set AFC range to 20000 and see wether it affects the carrier wave detection at least.

Hoel commented 3 years ago

OK, indeed changing to 20000 did affect the CW detection with AX5043GeneralRadioState()==0x0C, now it detects the CW even when it is not spot on the center frequency. Which is encouraging, however i still need to fix the preamble detection. by the way, i am still not sure wether i should set the xtal to 26000000 or 13000000 here?

//Set RX AFC Range
AX5043RXParamSetCorrectFrequencyOffsetLO(1);
uint32_t afc = (uint32_t)((20000 * (16777216.f / 26000000.f)) + 0.5f);
AX5043RXParamSetRXMaximumFrequencyOffset(afc);
NotBlackMagic commented 3 years ago

I had some time today, and access to the RF generator, and tested the AFC tracking in PSK mode as well. Simple carrier tracking seems to work well, with AX5043RXTrackingGetRFFrequency returning the correct frequency offset as well (tested with +/-25kHz AFC range and 100kHz BW to follow the maximum recommended AFC = 1/4 BW). According to the programming manual, both the center frequency and the AFC control don´t depend on the XTALDIV so you should use the 26000000. As for the preamble detection, I have not used that myself yet as I only used the HDLC mode, but it is very important that you set up the encoder correctly (Bit inversion, differential encoding, manchester, scrambler, etc...)

Hoel commented 3 years ago

good idea to use AX5043RXTrackingGetRFFrequency, i will try it too. Yes the AFC range is only 1/4 of RXBW, which is another problem because that mean i will not be able to cover the 200KHz span at once, and so it will be required to scan in 2 or 4 times, but first i need to know how many bits are required by the preamble detection, because the preamble is only 19 bit long, if the AFC + pattern match need more than few bit it will be compromized to scan in 2 or 4 times.

For preamble detection i really dont know what is wrong, in ax-radiolab i have set PSK, and DIFF. The modulation is DBPSK, so i dont know if i have something else to set.

Hoel commented 3 years ago

for some reason AX5043RXTrackingGetRFFrequency doesnt work here and always return 0, but when i use

printf("%d\n",AX5043RXTrackingGetFrequency());

It returns a value, however it seems the AFC does not work well on my side, because here are the results :

VSG : 868128099  track :  5200
VSG : 868129099  track : -3300
VSG : 868130099  track : -11800
VSG : 868131099  track :  12300
VSG : 868132099  track :  5500
VSG : 868133099  track : -4700
VSG : 868134099  track : -14200
VSG : 868135099  track :  14300
VSG : 868136099  track :  2400
NotBlackMagic commented 3 years ago

I'm almost sure that to track, lock and detect the preamble in a 200kHz span you will need more then 19bits, maybe can get it working with very well tuned parameters for everything. AX5043RXTrackingGetRFFrequency and AX5043RXTrackingGetFrequency are not the same, AX5043RXTrackingGetRFFrequency is what you want as that is the value used in the AFC, AX5043RXTrackingGetFrequency is the frequency shift in FSK/FM decoding. If it is returning "0" then probably the frequency recovering loop is disabled, FREQGAINCx and FREQGAINDx set to 0x1F.

Hoel commented 3 years ago

They are, the problem must be elsewhere

    radio_write8(AX5043_REG_FREQUENCYGAINC0,     0x1F);
    radio_write8(AX5043_REG_FREQUENCYGAIND0,     0x1F);

    radio_write8(AX5043_REG_FREQUENCYGAINC1,     0x1F);
    radio_write8(AX5043_REG_FREQUENCYGAIND1,     0x1F);

    radio_write8(AX5043_REG_FREQUENCYGAINC3,     0x1F);
    radio_write8(AX5043_REG_FREQUENCYGAIND3,     0x1F);
NotBlackMagic commented 3 years ago

This is exactly what I said, with it set to 0x1F it will not work, as can be read in the Programming Manual.

Hoel commented 3 years ago

indeed, i see it now, no less than 16 registers to figure how to program. I am now considering the option to install a 16M TCXO on one of the test board just to be able to use your library directly, Setting up this chip is such a nightmare.

NotBlackMagic commented 3 years ago

It is quite a challenge yes... I will add the support for TCXO that need the XTALDIV, like your case, but I have first to see if I have a XO with such a frequency to test it and debug problems.

Hoel commented 3 years ago

anyway you have dug very deep into this transceiver, that is quite amazing, and you did quite a huge work with your library., it is a great help even if i cannot use it directly right now i could copy many functions that were needed.

I hope i will get it working for my use case, of course i already know it wont be able to listen to the whole 200KHz span and do the AFC and preamble detect over the whole span, it is just not possible simply by the fact AFC must be 1/4 RXBW, however i still have some hope that it could be done in 4 sections. Even tho, due to the high RXBW the impact on sensitivity is non neglictible.

If everything fails i will go to plan B which is to use the AX5043 in the "secret" IQ mode, which is non publicly documented (under NDA) where we can output the IQ datas on two pins, i will then sample them at 192KHz on a Cortex M4 and adapt the current DSP chain to use both I and Q (at the moment only I is used, from direct acquisition at 1.6MSPS of a 800KHz IF).

I know this solution works and can reach sensitivity over -100dBm, in term of BOM it is not as good as using the AX5243 to directly demodulate because i still have to keep a Cortex M4 with quite a lot of flash and RAM but it may prove a little less costly than the curent BOM which has a tuner and expensive AGC AD8367.

Hoel commented 3 years ago

i now have the exact configuration which was used on the transmit side, the only difference being that in the actual use case there is a random TX channel hopping within the 200KHz span. This was for 48MHz TCXO so i modified one of my board to accept a 48M TCXO and i had to modify the circuit because my 48M TCXO is a clipped sinewave type but the circuit was intended for a CMOS type. At first sight there is already one difference with my configuration, the coding is set to differential, which i did, but also to invert, which i did not do.

void base_conf() {

    Delayms(5); // Wait

    /* Common configuration commands */
    AXAddrConfigWrite(0xF5F, 0xE1); // MODCFGP register. It is needed
    AXAddrConfigWrite(AX5043_REG_PINFUNCPWRAMP, 0x07); // Enable TCXO
    AXAddrConfigWrite(AX5043_REG_FRAMING, 0x06); //mode RAW pattern match crc off
    AXAddrConfigWrite(AX5043_REG_WAKEUPXOEARLY, 0x01); //wake up crystal 1 cycle before
    AXAddrConfigWrite(AX5043_REG_DECIMATION, 0x7F); // 11 811 Hz => coeff
    AXAddrConfigWrite(AX5043_REG_RXDATARATE1, 0x9D);
    AXAddrConfigWrite(AX5043_REG_RXDATARATE0, 0x7A);
    AXAddrConfigWrite(AX5043_REG_MAXRFOFFSET2, 0x80);
    AXAddrConfigWrite(AX5043_REG_MAXRFOFFSET1, 0x00);
    AXAddrConfigWrite(AX5043_REG_MAXRFOFFSET0, 0xD4);
    AXAddrConfigWrite(AX5043_REG_RXPARAMSETS, 0xF4);
    AXAddrConfigWrite(AX5043_REG_FREQUENCYGAINA0, 0x0F);
    AXAddrConfigWrite(AX5043_REG_FREQUENCYGAINB0, 0x1F);
    AXAddrConfigWrite(AX5043_REG_FREQUENCYGAINC0, 0x0C);
    AXAddrConfigWrite(AX5043_REG_FREQUENCYGAIND0, 0x0C);
    AXAddrConfigWrite(AX5043_REG_FREQUENCYGAINC1, 0x0C);
    AXAddrConfigWrite(AX5043_REG_FREQUENCYGAIND1, 0x0c);
    AXAddrConfigWrite(AX5043_REG_FREQUENCYGAINA1, 0x0F);
    AXAddrConfigWrite(AX5043_REG_FREQUENCYGAINB1, 0x1F);
    AXAddrConfigWrite(AX5043_REG_AGCGAIN3, 0xFF);
    AXAddrConfigWrite(AX5043_REG_FREQUENCYGAINA3, 0x0F);
    AXAddrConfigWrite(AX5043_REG_FREQUENCYGAINB3, 0x1F);
    AXAddrConfigWrite(AX5043_REG_FREQUENCYGAINC3, 0x0D);
    AXAddrConfigWrite(AX5043_REG_FREQUENCYGAIND3, 0x0D);
    AXAddrConfigWrite(AX5043_REG_PLLRNGCLK, 0x05);
    AXAddrConfigWrite(AX5043_REG_BBTUNE, 0x0F);
    AXAddrConfigWrite(AX5043_REG_BBOFFSCAP, 0x77);
    AXAddrConfigWrite(AX5043_REG_PKTADDRCFG, 0x80); //MSB first
    AXAddrConfigWrite(AX5043_REG_PKTLENCFG, 0);      //0 bits length
    AXAddrConfigWrite(AX5043_REG_PKTLENOFFSET, 0x0F); //add 15 to length byte
    AXAddrConfigWrite(AX5043_REG_PKTMAXLEN, 0xC8); // max len 200...

    AXAddrConfigWrite(AX5043_REG_MATCH0PAT3, 0xE4);
    AXAddrConfigWrite(AX5043_REG_MATCH0PAT1, 0x00);
    AXAddrConfigWrite(AX5043_REG_MATCH0PAT0, 0x00);
    AXAddrConfigWrite(AX5043_REG_MATCH1PAT1, 0x55);
    AXAddrConfigWrite(AX5043_REG_MATCH1PAT0, 0x55);
    AXAddrConfigWrite(AX5043_REG_MATCH1MAX, 0x0A);
    AXAddrConfigWrite(AX5043_REG_TMGRXBOOST, 0x5B);
    AXAddrConfigWrite(AX5043_REG_TMGRXSETTLE, 0x3E);
    AXAddrConfigWrite(AX5043_REG_PKTCHUNKSIZE, 0x0D); //max chunk 240
    AXAddrConfigWrite(AX5043_REG_PKTACCEPTFLAGS, 0x20); //accept packet on multiple fifo chunks
    AXAddrConfigWrite(0xF1C, 0x07);
    AXAddrConfigWrite(0xF21, 0x5C);
    AXAddrConfigWrite(0xF22, 0x53);
    AXAddrConfigWrite(0xF23, 0x76);
    AXAddrConfigWrite(0xF26, 0x92);
    AXAddrConfigWrite(0xF34, 0x08);
    AXAddrConfigWrite(0xF35, 0x11);
    AXAddrConfigWrite(0xF44, 0x24);
    AXAddrConfigWrite(0xF18, 0x06);
    AXAddrConfigWrite(0xF00, 0x0F);
    AXAddrConfigWrite(AX5043_REG_PLLLOOP, 0x07);
    AXAddrConfigWrite(AX5043_REG_PLLVCODIV, 0x20);
    AXAddrConfigWrite(AX5043_REG_XTALCAP, 0x00);
    AXAddrConfigWrite(AX5043_REG_XTALOSC, 0x04);
    AXAddrConfigWrite(AX5043_REG_XTALAMPL, 0x00);
    AXAddrConfigWrite(AX5043_REG_REF, 0x03);
    AXAddrConfigWrite(AX5043_REG_RXDATARATE2, 0x00);    //40314 => 600.015
    AXAddrConfigWrite(AX5043_REG_MAXDROFFSET2, 0x00);
    AXAddrConfigWrite(AX5043_REG_MAXDROFFSET1, 0x00);
    AXAddrConfigWrite(AX5043_REG_MAXDROFFSET0, 0x00);
    AXAddrConfigWrite(AX5043_REG_FREQDEV10, 0x00);
    AXAddrConfigWrite(AX5043_REG_FREQDEV00, 0x00);
    AXAddrConfigWrite(AX5043_REG_BBOFFSRES0, 0x00);
    AXAddrConfigWrite(AX5043_REG_AGCAHYST1, 0x00);
    AXAddrConfigWrite(AX5043_REG_AGCMINMAX1, 0x00);
    AXAddrConfigWrite(AX5043_REG_FREQDEV11, 0x00);
    AXAddrConfigWrite(AX5043_REG_BBOFFSRES1, 0x00);
    AXAddrConfigWrite(AX5043_REG_AGCAHYST3, 0x00);
    AXAddrConfigWrite(AX5043_REG_AGCMINMAX3, 0x00);
    AXAddrConfigWrite(AX5043_REG_FREQDEV13, 0x00);
    AXAddrConfigWrite(AX5043_REG_BBOFFSRES3, 0x00);
    AXAddrConfigWrite(AX5043_REG_BGNDRSSITHR, 0x00);
    //AXAddrConfigWrite(AX5043_REG_DACVALUE1, 0x00);
    //AXAddrConfigWrite(AX5043_REG_DACVALUE0, 0x00);
    //AXAddrConfigWrite(AX5043_REG_DACCONFIG, 0x00);

    AXAddrConfigWrite(AX5043_REG_IFFREQ0, 0x89);
    AXAddrConfigWrite(AX5043_REG_IFFREQ1, 0x00);    //Fif,3135.7Hz
    AXAddrConfigWrite(AX5043_REG_FSKDMAX1, 2);
    AXAddrConfigWrite(AX5043_REG_FSKDMAX0, 0x4C);
    AXAddrConfigWrite(AX5043_REG_FSKDMIN1, 0xFD);
    AXAddrConfigWrite(AX5043_REG_FSKDMIN0, 0xB4);
    AXAddrConfigWrite(AX5043_REG_TIMEGAIN0, 0x9A);
    AXAddrConfigWrite(AX5043_REG_DRGAIN0, 0x94);
    AXAddrConfigWrite(AX5043_REG_PHASEGAIN0, 0x83); //2.1k
    AXAddrConfigWrite(AX5043_REG_TIMEGAIN1, 0x98);
    AXAddrConfigWrite(AX5043_REG_DRGAIN1, 0x93);
    AXAddrConfigWrite(AX5043_REG_PHASEGAIN1, 0x83); //2.1k
    AXAddrConfigWrite(AX5043_REG_TIMEGAIN3, 0x97);
    AXAddrConfigWrite(AX5043_REG_DRGAIN3, 0x92);
    AXAddrConfigWrite(AX5043_REG_PHASEGAIN3, 0x83); // 2.1k
    AXAddrConfigWrite(AX5043_REG_PKTMISCFLAGS, 0x03);

}
void tx_conf(){

    AXAddrConfigWrite(AX5043_REG_PINFUNCSYSCLK, 0x01); //output 1
    AXAddrConfigWrite(AX5043_REG_PINFUNCDCLK, 0x01);   //output 1
    AXAddrConfigWrite(AX5043_REG_PINFUNCDATA, 0x01);   //output 1
    AXAddrConfigWrite(AX5043_REG_PINFUNCANTSEL, 0x01); //output 1
    AXAddrConfigWrite(AX5043_REG_AMPLFILTER, 0);
    AXAddrConfigWrite(AX5043_REG_AGCGAIN0, 0x99);
    AXAddrConfigWrite(AX5043_REG_AGCTARGET0, 0x76);
    /* Relative Bandwidth,coef * fXTAL Hz / (2^16 * fXTALDIV * DECIMATION),48MHz / (65536 * 2 * 127),2.1k */
    /* with coef is a constant defined with bits [7-6] of PHASEGAIN register */
    AXAddrConfigWrite(AX5043_REG_AMPLITUDEGAIN0, 0x46);
    AXAddrConfigWrite(AX5043_REG_FOURFSK0, 0);
    AXAddrConfigWrite(AX5043_REG_AGCGAIN1, 0x99);
    AXAddrConfigWrite(AX5043_REG_AGCTARGET1, 0x76);
    AXAddrConfigWrite(AX5043_REG_AMPLITUDEGAIN1, 0x46);
    AXAddrConfigWrite(AX5043_REG_FREQDEV01, 0x38);
    AXAddrConfigWrite(AX5043_REG_FOURFSK1, 0);

    AXAddrConfigWrite(AX5043_REG_AGCTARGET3, 0x76);
    AXAddrConfigWrite(AX5043_REG_AMPLITUDEGAIN3, 0x46);
    AXAddrConfigWrite(AX5043_REG_FREQDEV03, 0x38);
    AXAddrConfigWrite(AX5043_REG_FOURFSK3, 0);

    AXAddrConfigWrite(AX5043_REG_MODCFGF, 0); //FReq shape: unshaped
    AXAddrConfigWrite(AX5043_REG_FSKDEV2, 0); // FSK dev 25.7??
    AXAddrConfigWrite(AX5043_REG_FSKDEV1, 0);
    AXAddrConfigWrite(AX5043_REG_FSKDEV0, 0x09);
    AXAddrConfigWrite(AX5043_REG_MODCFGA, 0x15); // Enable tx diff, raised cosine ampl shape, 2bits of ramp up

    //if (bitrate == 100)
    {
        AXAddrConfigWrite(AX5043_REG_TXRATE2, 0);
        AXAddrConfigWrite(AX5043_REG_TXRATE1, 0);
        AXAddrConfigWrite(AX5043_REG_TXRATE0, 0x23); //tx rate : 100.136Hz
    }

//  else if (bitrate == 600) {
//      AXAddrConfigWrite(AX5043_REG_TXRATE2, 0);
//      AXAddrConfigWrite(AX5043_REG_TXRATE1, 0);
//      AXAddrConfigWrite(AX5043_REG_TXRATE0, 0xD2);
//  }

    //max output power
    AXAddrConfigWrite(AX5043_REG_TXPWRCOEFFB1, 0xF);
    AXAddrConfigWrite(AX5043_REG_TXPWRCOEFFB0, 0xFF);

    AXAddrConfigWrite(AX5043_REG_MATCH0PAT2, 0x48);
    AXAddrConfigWrite(AX5043_REG_MATCH0LEN, 0x0C); //match 13 bits  on RAW(MSB de MATCH0)
    AXAddrConfigWrite(AX5043_REG_MATCH0MAX, 0x0C);
    AXAddrConfigWrite(AX5043_REG_MATCH1LEN, 0x8A); //match 11 bits on RAW
    AXAddrConfigWrite(AX5043_REG_TMGRXOFFSACQ, 0x9C);
    AXAddrConfigWrite(AX5043_REG_TMGRXCOARSEAGC, 0x32);
    AXAddrConfigWrite(AX5043_REG_TMGRXAGC, 0);
    AXAddrConfigWrite(AX5043_REG_TMGRXRSSI, 0x08);
    AXAddrConfigWrite(AX5043_REG_TMGRXPREAMBLE2, 0x17);
    //AXAddrConfigWrite(AX5043_REG_RSSIREFERENCE,(u8)Rssi_Reference);
    AXAddrConfigWrite(AX5043_REG_RSSIABSTHR, 0xC6);
    AXAddrConfigWrite(AX5043_REG_BGNDRSSIGAIN, 0x02);

    AXAddrConfigWrite(AX5043_REG_MODULATION, 0x4); //PSK
    AXAddrConfigWrite(AX5043_REG_ENCODING, 0x03);  //invert / diff encode
    AXAddrConfigWrite(AX5043_REG_PINFUNCIRQ, 3);
    AXAddrConfigWrite(AX5043_REG_PKTSTOREFLAGS, 0);

    AXAddrConfigWrite(AX5043_REG_PLLCPI, 0x1A);
    AXAddrConfigWrite(AX5043_REG_PLLVCOI, 0x96); // Don't forget to uncomment
}
NotBlackMagic commented 3 years ago

Your option B was an idea that I wanted to do to, when I find out which register holds the I and Q datas. It has to be possible to get as outputing one of them through the DAC is possible... I can not help you much with this part now as I have not used the transceiver in this way yet... Good luck!

Hoel commented 3 years ago

Yes, the secret "DSP mode" allows to get the IQ datas via an I2S interface, and even decimated i think, we can also get other informations related to phase and amplitude, so it is more than just one register.

I am already working on the layout of the PoC board for this, i added a 240MHz Cortex M4 (DSP+FPU) 1M flash and 226K RAM, the AX5043 and a BFU790F LNA (0.5dB NF, 20dB of gain) with matching at input and output and BPF at output (to avoid impeding the NF). i also added an RF switch to redirect the antenna either to ANTP1 (single end PA output) or to ANTP ANTN via the LNA and BPF, but this may not stay in the final version as for now it is not planned to send anything and the switch adds insertion loss which increases LNA NF. I was also thinking of installing the RF switch between input and output of the LNA to bypass it and avoid increasing the LNA NF, but i am not sure it will work (RF switch typically do not tolerate and DC voltage at IN or OUT pins).

NotBlackMagic commented 3 years ago

Over an I2S interface? Why do they not publish this stuff... I don't get it... Sounds like a very interesting design, I had planned to make a PocketCube sized transceiver module and the plan was to also use external LNA, PA and a SAW filter. I looked into some LNA+PA+Switch ICs from Skyworks, like the SKY65313-21 and similar ones.

Hoel commented 3 years ago

yes, other transeivers have similar non public modes (CC1101, CC1120 and CC1125, EFR32) but they are either limited (EFR32) not really functional (CC1101 outputs the datas at ADCCLK speed on a GPIO, noise is so high that the ADC stop working normally, CC1120 outputs via SPI but it maximum SPI rate below what you would need to get all the datas etc).

Anyway on the AX5043 this mode is totally functional, i know it from an LPWAN operator which used that for internal R&D.

FEMs, there is also RFX1010 but i decided to use discrete LNA because FEMs dont have very good noise figure, gain is lower and the price is higher. In the end the RF switch is across the LNA but before input and after output blocking caps, so it wont get any DC which should work and will not impact LNA noise figure while allowing to transmit. I dropped the SAW option as the cost is too high compared to discrete BPF.

Hoel commented 3 years ago

do you have an email, i have a document to share

NotBlackMagic commented 3 years ago

You can PM me through Insta, Twitter or Hackaday so that I can give you the e-mail or send it through those places directly. Or send it to social@notblackmagic.com (forwarded email).