Closed arshaki closed 3 years ago
Only DSSS despreading is functional. The despreader, CRC, and framer for the DSSS CCK rate are in the bladeRF-wiphy/fpga/vhdl/wlandsss files. The Viterbi decoder is in bladeRF-wiphy/fpga/ip/nuand/viterbi_decoder/ . The model for this core is also the same directory. The DSSS decoder in the wlandsss files do not require the Viterbi decoder or a deinterleaver.
Hi, thanks for uploading an interesting project. It looks like some code is missing, could you check?