I am trying to use modelsim to simulate the bladerf-micro platform on Windows. In ModelSim, I navigate to bladeRF/hdl/fpga/platforms/bladerf-micro/modelsim/ and execute do compile.do. I get the following error:
# -- Compiling architecture arch of sample_stream_tb
# ** Error: (vcom-11) Could not find work.tx.
# ** Error (suppressible): ../../../ip/nuand/./simulation/sample_stream_tb.vhd(207): (vcom-1195) Cannot find expanded name "work.tx".
# ** Error: ../../../ip/nuand/./simulation/sample_stream_tb.vhd(207): Unknown expanded name.
# ** Error: (vcom-11) Could not find work.rx.
# ** Error (suppressible): ../../../ip/nuand/./simulation/sample_stream_tb.vhd(257): (vcom-1195) Cannot find expanded name "work.rx".
# ** Error: ../../../ip/nuand/./simulation/sample_stream_tb.vhd(257): Unknown expanded name.
# ** Error: ../../../ip/nuand/./simulation/sample_stream_tb.vhd(455): VHDL Compiler exiting
This appears to be because sample_stream_tb.vhd is being compiled before rx.vhd and tx.vhd. I've tried editing compile.do so that rx.vhd and tx.vhd are compiled first, but this doesn't work.
I'm happy to explore the source of this issue in more detail, but if anyone can replicate the bug and/or offer suggestions it would be helpful. Thanks!
I am trying to use modelsim to simulate the bladerf-micro platform on Windows. In ModelSim, I navigate to
bladeRF/hdl/fpga/platforms/bladerf-micro/modelsim/
and executedo compile.do
. I get the following error:This appears to be because
sample_stream_tb.vhd
is being compiled beforerx.vhd
andtx.vhd
. I've tried editingcompile.do
so thatrx.vhd
andtx.vhd
are compiled first, but this doesn't work.I'm happy to explore the source of this issue in more detail, but if anyone can replicate the bug and/or offer suggestions it would be helpful. Thanks!