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OFS / ofs-agx7-pcie-attach

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N6001 build error in release/ofs-2023.2, tag: ofs-2023.2-1 due to PMCI subsytem IP #6

Closed umairsiddiqui-digitek closed 12 months ago

umairsiddiqui-digitek commented 12 months ago

I tried to buid the N6001 with Default .ip parameters

./ofs-common/scripts/common/syn/build_top.sh -p n6001 work_n6001

with quartus pro 23.1 with all the required patches

    Info: Version 23.1.0 Build 115 03/30/2023 Patches 0.14,0.17 SC Pro Edition

However I am getting following build error in PMCI subsytem IP

Info (16884): Verilog HDL info at top.sv(14): analyzing included file ../../../../src/includes/fpga_defines.vh File: /cicd_srv/ofs-agx7-pcie-attach/work_n6001/src/top/top.sv Line: 14
Info (19624): Verilog HDL info at top.sv(14): back to file '/cicd_srv/ofs-agx7-pcie-attach/work_n6001/src/top/top.sv' File: /cicd_srv/ofs-agx7-pcie-attach/work_n6001/src/top/top.sv Line: 14
Info (16884): Verilog HDL info at top.sv(20): analyzing included file ../../../../ipss/hssi/rtl/inc/ofs_fim_eth_plat_defines.svh File: /cicd_srv/ofs-agx7-pcie-attach/work_n6001/src/top/top.sv Line: 20
Info (19624): Verilog HDL info at top.sv(20): back to file '/cicd_srv/ofs-agx7-pcie-attach/work_n6001/src/top/top.sv' File: /cicd_srv/ofs-agx7-pcie-attach/work_n6001/src/top/top.sv Line: 20
Info: Elaborating from top-level entity "top"
Info (18235): Library search order is as follows: "rom_1port_2010; intel_mce_arb_100; fme_id_rom; altera_avalon_sc_fifo_1931; sc_fifo_tx_sc_fifo; altera_avalon_st_pipeline_stage_1930; avst_pipeline_st_pipeline_stage_0; altera_s10_user_rst_clkgate_1944; cfg_mon; altera_pr_stream_1920; altera_pr_ctrl_1920; intel_pr_mailbox_wrapper_1911; altera_s10_pr_1922; PR_IP; remote_debug_jtag_only_clock_in; altera_axi_bridge_1931; host_if; intel_st_dbg_if_120; avst_credit_endianness_adp_100; altera_reset_controller_1921; avst_credit_w2n_101; avst_ready_to_credit_102; sld_hub_ctrl_core_100; sld_hub_ctrl_100; avst_credit_n2w_101; avst_credit_max_ca_102; avst_credit_to_ready_102; altera_avalon_mm_bridge_2001; altera_avalon_onchip_memory2_1937; altera_merlin_master_translator_192; altera_merlin_slave_translator_191; altera_merlin_master_agent_191; altera_merlin_slave_agent_191; altera_merlin_router_1921; altera_merlin_traffic_limiter_191; altera_merlin_burst_adapter_1923; altera_merlin_demultiplexer_1921; altera_merlin_multiplexer_1921; altera_merlin_width_adapter_1920; altera_mm_interconnect_1920; data_format_adapter_1930; channel_adapter_1921; altera_avalon_st_adapter_1920; intel_jop_blaster_100; jop_blaster; remote_debug_jtag_only_reset_in; sys_clk; altera_merlin_axi_translator_1921; altera_merlin_axi_master_ni_1941; hs_clk_xer_1940; remote_debug_jtag_only; intel_configuration_reset_release_to_debug_logic_203; config_reset_release; altera_sld_host_endpoint_10; intel_soft_core_jtag_io_10; scjio_agilex; altera_sld_jtag_bridge_agent_1920; jtag_pr_sld_agent; jtag_pr_reset_release; altera_sld_jtag_bridge_host_1920; jtag_pr_sld_host; jtag_pr_reset_release_endpoint; altera_iopll_1931; sys_pll; qph_user_clk_iopll_RF100M; altera_iopll_reconfig_1940; qph_user_clk_iopll_reconfig; emif_csr_ic_clock_in; emif_csr_ic_reset_in; axi4lite_shim_10; emif_csr_slv; mem_ss_csr_mst; emif_dfh_mst; altera_merlin_axi_slave_ni_1950; emif_csr_ic; intel_pcie_ptile_ast_901; pcie_ss_100; pcie_ss; altera_error_response_slave_1931; hssi_ss_axilite_avmm_bridge_2110; hssi_ss_2250; altera_avalon_pio_1921; altera_avalon_jtag_uart_1921; altera_nios2_gen2_unit_1910; altera_nios2_gen2_1910; altera_avalon_timer_1931; altera_irq_mapper_2000; hssi_ss_dr_cpu_191; xcvrnphy_fme_411; alt_ehipc3_fm_2401; alt_ehipc3_fm_sl_avmm_rcfg_191; hssi_ss; ptp_sample_clk_pll; hssi_ss_csr_ic; hssi_ss_csr_ic_clock_in; hssi_ss_csr_ic_reset_in; hssi_ss_csr_mst; hssi_ss_ip_slv; hssi_ss_wrapper_slv; qsfp_ctrl; qsfp_ctrl_reset_in; altera_avalon_i2c_1922; qsfp_ctrl_i2c_0; qsfp_ctrl_onchip_memory2_0; qsfp_ctrl_clock_in; mem_ss_tg_axi_100; mem_ss_tg; apf_achk_slv; axi4lite_rsp_10; apf_default_slv; apf_bpf_mst; apf_bpf_slv; apf_clock_bridge; apf_mctp_mst; apf_pr_slv; apf_reset_bridge; apf_st2mm_mst; apf_st2mm_slv; apf_uart_mst; apf_uart_slv; apf; bpf_default_slv; bpf_apf_mst; bpf_apf_slv; bpf_clock_bridge; bpf_emif_slv; bpf_fme_mst; bpf_fme_slv; bpf_hssi_slv; bpf_pcie_slv; bpf_pmci_lpbk_mst; bpf_pmci_lpbk_slv; bpf_pmci_mst; bpf_pmci_slv; bpf_qsfp0_slv; bpf_qsfp1_slv; bpf_reset_bridge; bpf; emif_params_100; mem_ss_reset_controller_100; mem_ss_csr_100; altera_emif_cal_iossm_270; altera_emif_cal_270; altera_emif_arch_fm_191; altera_emif_fm_270; st_dc_fifo_1941; mm_ccb_1921; msa_ddr4_fm_100; altera_emif_fm_hps_270; altera_merlin_apb_translator_1920; altera_merlin_apb_slave_agent_1920; mem_ss_fm_310; mem_ss_fm; altera_emif_mem_model_core_ddr4_191; altera_emif_mem_model_191; ed_sim_mem; pmci_ss; altera_s10_mailbox_client_core_2012; altera_config_stream_endpoint_1920; altera_s10_mailbox_client_2022; pmci_ss_s10_mailbox_client_0; pmci_ss_axi_bridge_0; pmci_ss_axi_bridge_1; pmci_ss_clock_in; mctp_pcievdm_ctrlr_10; pmci_ss_mctp_pcievdm_ctrlr_0; pmci_ss_nios2_gen2_0; pmci_csr_10; pmci_ss_pmci_csr_0; pxeboot_optrom_10; pmci_ss_pxeboot_optrom_0; avmms_2_spim_bridge_10; pmci_ss_avmms_2_spim_bridge_0; pmci_ss_reset_in; spi_slave_to_avalon_mm_master_bridge_1913; pmci_ss_spi_slave_to_avalon_mm_master_bridge_0; intel_generic_serial_flash_interface_csr_2010; intel_generic_serial_flash_interface_xip_1930; intel_generic_serial_flash_interface_addr_1920; intel_generic_serial_flash_interface_cmd_1920; intel_generic_serial_flash_interface_if_ctrl_2010; intel_generic_serial_flash_interface_top_2023; pmci_ss_intel_generic_serial_flash_interface_top_0; pmci_ss_onchip_memory2_1; pmci_ss_onchip_memory2_0; flash_burst_master_10; pmci_ss_flash_burst_master_0; ncsi_ctrlr_10; pmci_ss_ncsi_ctrlr_0; pmci_ss_timer_0; altera_config_status_endpoint_1920; asd_cmd_handler_1922; stratix10_asd_1931; pmci_ss_stratix10_asd_0; hps_ss; hps_ss_clock_in_0; intel_agilex_interface_generator_191; intel_agilex_hps_2300; hps_ss_intel_agilex_hps_1; hps_ss_reset_in_0; altera_16550_uart_1913; uart; intel_mce_100". Quartus will look for undefined design units in your libraries in that order. To modify the ordering, please specify a semi-colon separated library list using the assignment LIBRARY_SEARCH_ORDER.
Error (13305): Verilog HDL error at pmci_ss.v(747): can't find port "avmm_waitrequest" File: /cicd_srv/ofs-agx7-pcie-attach/work_n6001/ipss/pmci/pmci_ss/synth/pmci_ss.v Line: 747
Error (16186): Can't elaborate top-level user hierarchy
Error: Flow failed: ERROR: Elaboration Failed for Partition(s) "|"

Error: Quartus Prime Synthesis was unsuccessful. 3 errors, 85 warnings
    Error: Peak virtual memory: 1853 megabytes
    Error: Processing ended: Tue Sep 19 06:22:13 2023
    Error: Elapsed time: 00:01:30
    Error: System process ID: 2332419
Error (21794): Quartus Prime Full Compilation was unsuccessful. 5 errors, 28860 warnings
Error: Flow compile (for project /cicd_srv/ofs-agx7-pcie-attach/work_n6001/syn/board/n6001/syn_top/ofs_top) was not successful
Error: run_flow flow:run1 finished: 0 Failed
Error (23031): Evaluation of Tcl script /tools/altera/v23.1pro/quartus/common/tcl/internal/qsh_flowengine.tcl unsuccessful
Error: Quartus Prime Shell was unsuccessful. 12 errors, 28860 warnings
    Error: Peak virtual memory: 1311 megabytes
    Error: Processing ended: Tue Sep 19 06:22:20 2023
    Error: Elapsed time: 00:23:49
    Error: System process ID: 2322748
umairsiddiqui-digitek commented 12 months ago

sorry forgot to install new quartus patches

Quartus Prime Pro Patch: 0.19 patch (Ethernet Subsystem) and 0.11 patch (OneAPI). Note that patches are found at the bottom of this page in the assets.

https://github.com/OFS/ofs-agx7-pcie-attach/releases/tag/ofs-2023.2-1