Closed umairsiddiqui-digitek closed 7 months ago
You are correct - the ASP itself doesn't use any DSP blocks, but the blocks that are in the static region aren't accessible to the ASP/kernel so they considered to be consumed. Those numbers in the xml file are difficult to keep up-to-date - the baseline is defined by the floorplan (the ASP+kernel can only utilize the resources available to the afu_main region), and then the ASP itself consumes logic and M20K blocks so they need to be subtracted from the number available to the afu_main region to find the values used in the xml file. Basically, to calculate numbers for a specific FIM+ASP combination:
i was wondering if calucation can be automated by synthesizing following reference design:
The Board Test
sample is a reference design that contains tests to check FPGA board interfaces and reports the following metrics:
In board_spec.xml
https://github.com/OFS/oneapi-asp/blob/1c8a325178d71df0e9db6416aeaa08a1d436a70d/n6001/hardware/ofs_n6001/board_spec.xml#L26C1-L27C1
it is reported that 2284 DSP blocks in AGF014 FPGA is already utilized? however I couldn't find any DSP related logic OFS-FIM and oneapi-asp (this repo)
https://github.com/OFS/ofs-agx7-pcie-attach
is it due to N6001 floor plan limitation?
https://github.com/OFS/ofs-agx7-pcie-attach/blob/release/ofs-2023.2/syn/board/n6001/setup/pr_assignments.tcl
or
https://github.com/OFS/ofs-agx7-pcie-attach/blob/release/ofs-2023.2/syn/board/n6001/setup/pr_assignments_slim.tcl