How can I use 64bit u-boot and 32bit kernel and 32bit optee?

ljmblueday commented 6 years ago

I try to use 64bit u-boot and 32bit kernel and 32bit optee in RPI3. I already change u-boot code for loading zImage(32bit kernel do not have header struct) I success booting ATF and initializing BL3-1. But I failed initializing BL3-2(optee) as below log message. How can I fix this problem? Anybody have some idea?

I use below command for downloading source code. repo init -u https://github.com/OP-TEE/manifest.git -m rpi3_stable.xml

------------------- cmd/bootm.c ----------------------------------------------

@@ -696,8 +697,10 @@ static int booti_start(cmd_tbl_t cmdtp, int flag, int argc, char const argv[], bootm_headers_t images) { int ret; '- struct Image_header ih; +// struct Image_header *ih;

ulong zi_start, zi_end;
printf("%s start\n", func); ret = do_bootm_states(cmdtp, flag, argc, argv, BOOTM_STATE_START, images, 1);

@@ -712,15 +715,18 @@ static int booti_start(cmd_tbl_t *cmdtp, int flag, int argc, images->ep); }

'- ret = booti_setup(images); +// ret = booti_setup(images);

ret = bootz_setup(images->ep, &zi_start, &zi_end);
```
if (ret != 0)
        return 1;
```

'- ih = (struct Image_header )map_sysmem(images->ep, 0); +// ih = (struct Image_header )map_sysmem(images->ep, 0);

'- lmb_reserve(&images->lmb, images->ep, le32_to_cpu(ih->image_size)); +// lmb_reserve(&images->lmb, images->ep, le32_to_cpu(ih->image_size));

lmb_reserve(&images->lmb, images->ep, zi_end - zi_start);

'- unmap_sysmem(ih); +// unmap_sysmem(ih);

    /*
     * Handle the BOOTM_STATE_FINDOTHER state ourselves as we do not

diff --git a/common/bootm.c b/common/bootm.c

----------------------------- optee log message ---------------------------------------------------- DEBUG: [0x0] TEE-CORE:add_phys_mem:524: CFG_SHMEM_START type NSEC_SHM 0x08000000 size 0x00400000 DEBUG: [0x0] TEE-CORE:add_phys_mem:524: CFG_TA_RAM_START type TA_RAM 0x08800000 size 0x01000000 DEBUG: [0x0] TEE-CORE:add_phys_mem:524: VCORE_UNPG_RW_PA type TEE_RAM_RW 0x0844b000 size 0x003b5000 DEBUG: [0x0] TEE-CORE:add_phys_mem:524: VCORE_UNPG_RX_PA type TEE_RAM_RX 0x08420000 size 0x0002b000 DEBUG: [0x0] TEE-CORE:add_phys_mem:524: CONSOLE_UART_BASE type IO_NSEC 0x3f200000 size 0x00100000 DEBUG: [0x0] TEE-CORE:verify_special_mem_areas:462: No NSEC DDR memory area defined DEBUG: [0x0] TEE-CORE:add_va_space:563: type RES_VASPACE size 0x00a00000 DEBUG: [0x0] TEE-CORE:add_va_space:563: type SHM_VASPACE size 0x02000000 DEBUG: [0x0] TEE-CORE:dump_mmap_table:694: type TEE_RAM_RX va 0x08420000..0x0844afff pa 0x08420000..0x0844afff size 0x0002b000 (smallpg) DEBUG: [0x0] TEE-CORE:dump_mmap_table:694: type TEE_RAM_RW va 0x0844b000..0x087fffff pa 0x0844b000..0x087fffff size 0x003b5000 (smallpg) DEBUG: [0x0] TEE-CORE:dump_mmap_table:694: type PAGER_VASPACE va 0x08800000..0x0881ffff pa 0x00000000..0x0001ffff size 0x00020000 (smallpg) DEBUG: [0x0] TEE-CORE:dump_mmap_table:694: type NSEC_SHM va 0x08900000..0x08cfffff pa 0x08000000..0x083fffff size 0x00400000 (pgdir) DEBUG: [0x0] TEE-CORE:dump_mmap_table:694: type RES_VASPACE va 0x08d00000..0x096fffff pa 0x00000000..0x009fffff size 0x00a00000 (pgdir) DEBUG: [0x0] TEE-CORE:dump_mmap_table:694: type SHM_VASPACE va 0x09700000..0x0b6fffff pa 0x00000000..0x01ffffff size 0x02000000 (pgdir) DEBUG: [0x0] TEE-CORE:dump_mmap_table:694: type TA_RAM va 0x0b700000..0x0c6fffff pa 0x08800000..0x097fffff size 0x01000000 (pgdir) DEBUG: [0x0] TEE-CORE:dump_mmap_table:694: type IO_NSEC va 0x0c700000..0x0c7fffff pa 0x3f200000..0x3f2fffff size 0x00100000 (pgdir) DEBUG: [0x0] TEE-CORE:core_mmu_alloc_l2:249: L2 table used: 1/4 DEBUG: [0x0] TEE-CORE:core_mmu_alloc_l2:249: L2 table used: 2/4 DEBUG: [0x0] TEE-CORE:core_mmu_alloc_l2:249: L2 table used: 3/4 DEBUG: [0x0] TEE-CORE:core_mmu_alloc_l2:249: L2 table used: 4/4 DEBUG: [0x0] TEE-CORE:core_mmu_alloc_l2:249: L2 table used: 5/4 ERROR: [0x0] TEE-CORE: assertion 'l2' failed at core/arch/arm/mm/core_mmu_v7.c:689 ERROR: [0x0] TEE-CORE: Panic at core/kernel/assert.c:50 <_assert_break> ERROR: [0x0] TEE-CORE: Call stack: ERROR: [0x0] TEE-CORE: 0x08423fe1 ERROR: [0x0] TEE-CORE: 0x08428d39 ERROR: [0x0] TEE-CORE: 0x0842844f ERROR: [0x0] TEE-CORE: 0x08425b0b ERROR: [0x0] TEE-CORE: 0x0842476b ERROR: [0x0] TEE-CORE: 0x084200bc

etienne-lms commented 6 years ago

DEBUG: [0x0] TEE-CORE:core_mmu_alloc_l2:249: L2 table used: 5/4

You are running out of mmu translation table. It seems you must define MAX_XLAT_TABLES in your platform_config.h to a value bigger than the default 4. (I can't teel why)

ljmblueday commented 6 years ago

@etienne-lms core_mmu_lpae.c use default to 5, why do core_mmu_v7 use default to 4?

etienne-lms commented 6 years ago

32bit mmu (core_mmu_v7.c) implementation is based on the 4 translation tables mentioned here plus an extra big root translation table to cover the whole virtual address range. So actually 32bit mmu consumes 5 tables: 4 of 1kByte and 1 of 16kByte.

LPAE does not need this extra big root translation table and only relies on "generic 4kByte large" translation tables.

Different implementation, different number of tables.

Note that MAX_XLAT_TABLES is really platform dependent as it depends of the platform memory layout and mapping strategy.

ljmblueday commented 6 years ago

I success initializing optee but it can not jump to kernel image. I think that the problem is occurred by bit different(ATF use 64bit, kernel use 32bit). I change bl32_get_uboot_el code for 32bit next image but system occur unhandled exception. Which code is modified for changing from 64bit to 32bit at next image(kernel(bl33)).

unsigned int bl31_get_uboot_el(void) { struct uboot_data data = (struct uboot_data )(&__uboot_data); INFO("%s: start \n", func);

/ Running AARCH64 / if (data->el) { / EL2 / return(0x3d9); //arch32 // return(0x3c9); } else { / EL1 / return(0x3c5); } }

-------------------------------- log message --------------------------------- INFO: TEE-CORE: OP-TEE version: 2.5.0-171-g093fb9c-dev #10 Thu Nov 9 06:29:05 UTC 2017 arm DEBUG: [0x0] TEE-CORE:tee_ta_register_ta_store:609: Registering TA store: 'REE' (priority 10) DEBUG: [0x0] TEE-CORE:mobj_mapped_shm_init:603: Shared memory address range: 9700000, b700000 INFO: TEE-CORE: Initialized DEBUG: [0x0] TEE-CORE:init_primary_helper:787: Primary CPU switching to normal world boot INFO: opteed_smc_handler: start INFO: bl31_plat_get_next_image_ep_info: start INFO: BL3-1: Preparing for EL3 exit to normal world INFO: BL3-1: Next image address = 0x10000000 INFO: BL3-1: Next image spsr = 0x3d9 INFO: cm_init_context : 32bit mode for EL1 INFO: cm_prepare_el3_exit: security_state = 1 INFO: cm_prepare_el3_exit: scr_el3 0x31 INFO: test write scr el3 bit INFO: el1_sysregs_context_restore bit INFO: cm_set_next_context Unhandled Exception in EL3. x30 = 0x0000000008407a04 x0 = 0x000000003ab2d000 x1 = 0x0000000000000000 x2 = 0x0000000000000000 x3 = 0x0000000000000000 x4 = 0x0000000000000000 x5 = 0x0000000000000000 x6 = 0x0000000000000000 x7 = 0x0000000000000000 x8 = 0x0000000000000000 x9 = 0x0000000000000000 x10 = 0x0000000000000000 x11 = 0x0000000000000000 x12 = 0x0000000000000000 x13 = 0x0000000000000000 x14 = 0x0000000000000000 x15 = 0x0000000000000000 x16 = 0x0000000000000000 x17 = 0x0000000000000000 x18 = 0x0000000000000000 x19 = 0x0000000000000000 x20 = 0x0000000000000000 x21 = 0x0000000000000000 x22 = 0x0000000000000000 x23 = 0x0000000000000000 x24 = 0x0000000000000000 x25 = 0x0000000000000000 x26 = 0x0000000000000000 x27 = 0x0000000000000000 x28 = 0x0000000000000000 x29 = 0x0000000000000000

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OP-TEE / optee_os

How can I use 64bit u-boot and 32bit kernel and 32bit optee? #1920