Boot process halts after I/TC: Primary CPU switching to normal world boot

coveritytest commented 2 years ago

System boots just fine until the transition to U-Boot which never happens, it just endlessly reboots after the watchdog triggers. Any ideas would be very appreciated.

NOTICE:  CPU: STM32MP157CAC Rev.Z
NOTICE:  Model: MyModel
NOTICE:  Bootrom authentication failed
NOTICE:  BL2: v2.6-stm32mp1-r1.0(release):v2.6-stm32mp-r1-83-ge1fcbb283-dirty
NOTICE:  BL2: Built : 09:30:49, Oct  4 2022
NOTICE:  ROTPK is not deployed on platform. Skipping ROTPK verification.
NOTICE:  ROTPK is not deployed on platform. Skipping ROTPK verification.
NOTICE:  BL2: Booting BL32
I/TC: Early console on UART#4
D/TC:0   add_phys_mem:596 TEE_SHMEM_START type NSEC_SHM 0xde000000 size 0x00200000
D/TC:0   add_phys_mem:596 TA_RAM_START type TA_RAM 0xde200000 size 0x01e00000
D/TC:0   add_phys_mem:596 VCORE_INIT_RX_PA type INIT_RAM_RX 0x2fff0000 size 0x0000f000
D/TC:0   add_phys_mem:596 VCORE_UNPG_RW_PA type TEE_RAM_RW 0x2ffd7000 size 0x00019000
D/TC:0   add_phys_mem:596 VCORE_UNPG_RX_PA type TEE_RAM_RX 0x2ffc0000 size 0x00017000
D/TC:0   add_phys_mem:596 TEE_RAM_START type ROM_SEC 0x2ffc0000 size 0x0003f000
D/TC:0   add_phys_mem:596 DDR_BASE type RAM_NSEC 0xc0000000 size 0x00001000
D/TC:0   add_phys_mem:596 ROUNDDOWN(0xa0021000ul, CORE_MMU_PGDIR_SIZE) type IO_SEC 0xa0000000 size 0x00200000
D/TC:0   add_phys_mem:596 ROUNDDOWN(0x54000000, CORE_MMU_PGDIR_SIZE) type IO_SEC 0x54000000 size 0x00200000
D/TC:0   add_phys_mem:596 ROUNDDOWN(0x50000000, CORE_MMU_PGDIR_SIZE) type IO_SEC 0x50000000 size 0x00200000
D/TC:0   add_phys_mem:596 ROUNDDOWN(0x5c000000, CORE_MMU_PGDIR_SIZE) type IO_SEC 0x5c000000 size 0x00200000
D/TC:0   add_phys_mem:596 ROUNDDOWN(0x5a000000, CORE_MMU_PGDIR_SIZE) type IO_SEC 0x5a000000 size 0x00200000
D/TC:0   add_phys_mem:596 ROUNDDOWN(0x50020000, CORE_MMU_PGDIR_SIZE) type IO_SEC 0x50000000 size 0x00200000
D/TC:0   add_phys_mem:610 Physical mem map overlaps 0x50000000
D/TC:0   add_phys_mem:596 ROUNDDOWN(0x54000000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x54000000 size 0x00200000
D/TC:0   add_phys_mem:596 ROUNDDOWN(0x50000000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x50000000 size 0x00200000
D/TC:0   add_phys_mem:596 ROUNDDOWN(0x5c000000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x5c000000 size 0x00200000
D/TC:0   add_phys_mem:596 ROUNDDOWN(0x5a000000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x5a000000 size 0x00200000
D/TC:0   add_phys_mem:596 ROUNDDOWN(0x50020000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x50000000 size 0x00200000
D/TC:0   add_phys_mem:610 Physical mem map overlaps 0x50000000
D/TC:0   add_phys_mem:596 ROUNDDOWN(0x44000000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x44000000 size 0x00200000
D/TC:0   add_phys_mem:596 ROUNDDOWN(0x40000000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x40000000 size 0x00200000
D/TC:0   add_phys_mem:596 CFG_STM32MP1_SCMI_SHM_BASE type IO_NSEC 0x2ffff000 size 0x00001000
D/TC:0   add_va_space:636 type RES_VASPACE size 0x00a00000
D/TC:0   add_va_space:636 type SHM_VASPACE size 0x02000000
D/TC:0   dump_mmap_table:751 type TA_RAM       va 0x29800000..0x2b5fffff pa 0xde200000..0xdfffffff size 0x01e00000 (pgdir)
D/TC:0   dump_mmap_table:751 type NSEC_SHM     va 0x2b800000..0x2b9fffff pa 0xde000000..0xde1fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:751 type IO_SEC       va 0x2ba00000..0x2bbfffff pa 0xa0000000..0xa01fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:751 type IO_NSEC      va 0x2bc00000..0x2bdfffff pa 0x5c000000..0x5c1fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:751 type IO_SEC       va 0x2be00000..0x2bffffff pa 0x5c000000..0x5c1fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:751 type IO_SEC       va 0x2c000000..0x2c1fffff pa 0x5a000000..0x5a1fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:751 type IO_NSEC      va 0x2c200000..0x2c3fffff pa 0x5a000000..0x5a1fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:751 type IO_SEC       va 0x2c400000..0x2c5fffff pa 0x54000000..0x541fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:751 type IO_NSEC      va 0x2c600000..0x2c7fffff pa 0x54000000..0x541fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:751 type IO_NSEC      va 0x2c800000..0x2c9fffff pa 0x50000000..0x501fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:751 type IO_SEC       va 0x2ca00000..0x2cbfffff pa 0x50000000..0x501fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:751 type IO_NSEC      va 0x2cc00000..0x2cdfffff pa 0x44000000..0x441fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:751 type IO_NSEC      va 0x2ce00000..0x2cffffff pa 0x40000000..0x401fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:751 type RES_VASPACE  va 0x2d000000..0x2d9fffff pa 0x00000000..0x009fffff size 0x00a00000 (pgdir)
D/TC:0   dump_mmap_table:751 type SHM_VASPACE  va 0x2dc00000..0x2fbfffff pa 0x00000000..0x01ffffff size 0x02000000 (pgdir)
D/TC:0   dump_mmap_table:751 type RAM_NSEC     va 0x2ff7f000..0x2ff7ffff pa 0xc0000000..0xc0000fff size 0x00001000 (smallpg)
D/TC:0   dump_mmap_table:751 type IO_NSEC      va 0x2ff80000..0x2ff80fff pa 0x2ffff000..0x2fffffff size 0x00001000 (smallpg)
D/TC:0   dump_mmap_table:751 type ROM_SEC      va 0x2ff81000..0x2ffbffff pa 0x2ffc0000..0x2fffefff size 0x0003f000 (smallpg)
D/TC:0   dump_mmap_table:751 type TEE_RAM_RX   va 0x2ffc0000..0x2ffd6fff pa 0x2ffc0000..0x2ffd6fff size 0x00017000 (smallpg)
D/TC:0   dump_mmap_table:751 type TEE_RAM_RW   va 0x2ffd7000..0x2ffeffff pa 0x2ffd7000..0x2ffeffff size 0x00019000 (smallpg)
D/TC:0   dump_mmap_table:751 type INIT_RAM_RX  va 0x2fff0000..0x2fffefff pa 0x2fff0000..0x2fffefff size 0x0000f000 (smallpg)
D/TC:0   dump_mmap_table:751 type PAGER_VASPACE va 0x2ffff000..0x301bffff pa 0x00000000..0x001c0fff size 0x001c1000 (smallpg)
D/TC:0   core_mmu_xlat_table_alloc:513 xlat tables used 1 / 4
D/TC:0   core_mmu_xlat_table_alloc:513 xlat tables used 2 / 4
D/TC:0   core_mmu_xlat_table_alloc:513 xlat tables used 3 / 4
I/TC: 
I/TC: Pager is enabled. Hashes: 2880 bytes
D/TC:0 0 init_runtime:467 Checking hashes of pageable area
D/TC:0 0 init_runtime:473 hash pg_idx 0 hash 0x2ffef4b8 page 0x29800000
D/TC:0 0 init_runtime:473 hash pg_idx 1 hash 0x2ffef4d8 page 0x29801000
D/TC:0 0 init_runtime:473 hash pg_idx 2 hash 0x2ffef4f8 page 0x29802000
D/TC:0 0 init_runtime:473 hash pg_idx 3 hash 0x2ffef518 page 0x29803000
D/TC:0 0 init_runtime:473 hash pg_idx 4 hash 0x2ffef538 page 0x29804000
D/TC:0 0 init_runtime:473 hash pg_idx 5 hash 0x2ffef558 page 0x29805000
D/TC:0 0 init_runtime:473 hash pg_idx 6 hash 0x2ffef578 page 0x29806000
D/TC:0 0 init_runtime:473 hash pg_idx 7 hash 0x2ffef598 page 0x29807000
D/TC:0 0 init_runtime:473 hash pg_idx 8 hash 0x2ffef5b8 page 0x29808000
D/TC:0 0 init_runtime:473 hash pg_idx 9 hash 0x2ffef5d8 page 0x29809000
D/TC:0 0 init_runtime:473 hash pg_idx 10 hash 0x2ffef5f8 page 0x2980a000
D/TC:0 0 init_runtime:473 hash pg_idx 11 hash 0x2ffef618 page 0x2980b000
D/TC:0 0 init_runtime:473 hash pg_idx 12 hash 0x2ffef638 page 0x2980c000
D/TC:0 0 init_runtime:473 hash pg_idx 13 hash 0x2ffef658 page 0x2980d000
D/TC:0 0 init_runtime:473 hash pg_idx 14 hash 0x2ffef678 page 0x2980e000
D/TC:0 0 init_runtime:473 hash pg_idx 15 hash 0x2ffef698 page 0x2980f000
D/TC:0 0 init_runtime:473 hash pg_idx 16 hash 0x2ffef6b8 page 0x29810000
D/TC:0 0 init_runtime:473 hash pg_idx 17 hash 0x2ffef6d8 page 0x29811000
D/TC:0 0 init_runtime:473 hash pg_idx 18 hash 0x2ffef6f8 page 0x29812000
D/TC:0 0 init_runtime:473 hash pg_idx 19 hash 0x2ffef718 page 0x29813000
D/TC:0 0 init_runtime:473 hash pg_idx 20 hash 0x2ffef738 page 0x29814000
D/TC:0 0 init_runtime:473 hash pg_idx 21 hash 0x2ffef758 page 0x29815000
D/TC:0 0 init_runtime:473 hash pg_idx 22 hash 0x2ffef778 page 0x29816000
D/TC:0 0 init_runtime:473 hash pg_idx 23 hash 0x2ffef798 page 0x29817000
D/TC:0 0 init_runtime:473 hash pg_idx 24 hash 0x2ffef7b8 page 0x29818000
D/TC:0 0 init_runtime:473 hash pg_idx 25 hash 0x2ffef7d8 page 0x29819000
D/TC:0 0 init_runtime:473 hash pg_idx 26 hash 0x2ffef7f8 page 0x2981a000
D/TC:0 0 init_runtime:473 hash pg_idx 27 hash 0x2ffef818 page 0x2981b000
D/TC:0 0 init_runtime:473 hash pg_idx 28 hash 0x2ffef838 page 0x2981c000
D/TC:0 0 init_runtime:473 hash pg_idx 29 hash 0x2ffef858 page 0x2981d000
D/TC:0 0 init_runtime:473 hash pg_idx 30 hash 0x2ffef878 page 0x2981e000
D/TC:0 0 init_runtime:473 hash pg_idx 31 hash 0x2ffef898 page 0x2981f000
D/TC:0 0 init_runtime:473 hash pg_idx 32 hash 0x2ffef8b8 page 0x29820000
D/TC:0 0 init_runtime:473 hash pg_idx 33 hash 0x2ffef8d8 page 0x29821000
D/TC:0 0 init_runtime:473 hash pg_idx 34 hash 0x2ffef8f8 page 0x29822000
D/TC:0 0 init_runtime:473 hash pg_idx 35 hash 0x2ffef918 page 0x29823000
D/TC:0 0 init_runtime:473 hash pg_idx 36 hash 0x2ffef938 page 0x29824000
D/TC:0 0 init_runtime:473 hash pg_idx 37 hash 0x2ffef958 page 0x29825000
D/TC:0 0 init_runtime:473 hash pg_idx 38 hash 0x2ffef978 page 0x29826000
D/TC:0 0 init_runtime:473 hash pg_idx 39 hash 0x2ffef998 page 0x29827000
D/TC:0 0 init_runtime:473 hash pg_idx 40 hash 0x2ffef9b8 page 0x29828000
D/TC:0 0 init_runtime:473 hash pg_idx 41 hash 0x2ffef9d8 page 0x29829000
D/TC:0 0 init_runtime:473 hash pg_idx 42 hash 0x2ffef9f8 page 0x2982a000
D/TC:0 0 init_runtime:473 hash pg_idx 43 hash 0x2ffefa18 page 0x2982b000
D/TC:0 0 init_runtime:473 hash pg_idx 44 hash 0x2ffefa38 page 0x2982c000
D/TC:0 0 init_runtime:473 hash pg_idx 45 hash 0x2ffefa58 page 0x2982d000
D/TC:0 0 init_runtime:473 hash pg_idx 46 hash 0x2ffefa78 page 0x2982e000
D/TC:0 0 init_runtime:473 hash pg_idx 47 hash 0x2ffefa98 page 0x2982f000
D/TC:0 0 init_runtime:473 hash pg_idx 48 hash 0x2ffefab8 page 0x29830000
D/TC:0 0 init_runtime:473 hash pg_idx 49 hash 0x2ffefad8 page 0x29831000
D/TC:0 0 init_runtime:473 hash pg_idx 50 hash 0x2ffefaf8 page 0x29832000
D/TC:0 0 init_runtime:473 hash pg_idx 51 hash 0x2ffefb18 page 0x29833000
D/TC:0 0 init_runtime:473 hash pg_idx 52 hash 0x2ffefb38 page 0x29834000
D/TC:0 0 init_runtime:473 hash pg_idx 53 hash 0x2ffefb58 page 0x29835000
D/TC:0 0 init_runtime:473 hash pg_idx 54 hash 0x2ffefb78 page 0x29836000
D/TC:0 0 init_runtime:473 hash pg_idx 55 hash 0x2ffefb98 page 0x29837000
D/TC:0 0 init_runtime:473 hash pg_idx 56 hash 0x2ffefbb8 page 0x29838000
D/TC:0 0 init_runtime:473 hash pg_idx 57 hash 0x2ffefbd8 page 0x29839000
D/TC:0 0 init_runtime:473 hash pg_idx 58 hash 0x2ffefbf8 page 0x2983a000
D/TC:0 0 init_runtime:473 hash pg_idx 59 hash 0x2ffefc18 page 0x2983b000
D/TC:0 0 init_runtime:473 hash pg_idx 60 hash 0x2ffefc38 page 0x2983c000
D/TC:0 0 init_runtime:473 hash pg_idx 61 hash 0x2ffefc58 page 0x2983d000
D/TC:0 0 init_runtime:473 hash pg_idx 62 hash 0x2ffefc78 page 0x2983e000
D/TC:0 0 init_runtime:473 hash pg_idx 63 hash 0x2ffefc98 page 0x2983f000
D/TC:0 0 init_runtime:473 hash pg_idx 64 hash 0x2ffefcb8 page 0x29840000
D/TC:0 0 init_runtime:473 hash pg_idx 65 hash 0x2ffefcd8 page 0x29841000
D/TC:0 0 init_runtime:473 hash pg_idx 66 hash 0x2ffefcf8 page 0x29842000
D/TC:0 0 init_runtime:473 hash pg_idx 67 hash 0x2ffefd18 page 0x29843000
D/TC:0 0 init_runtime:473 hash pg_idx 68 hash 0x2ffefd38 page 0x29844000
D/TC:0 0 init_runtime:473 hash pg_idx 69 hash 0x2ffefd58 page 0x29845000
D/TC:0 0 init_runtime:473 hash pg_idx 70 hash 0x2ffefd78 page 0x29846000
D/TC:0 0 init_runtime:473 hash pg_idx 71 hash 0x2ffefd98 page 0x29847000
D/TC:0 0 init_runtime:473 hash pg_idx 72 hash 0x2ffefdb8 page 0x29848000
D/TC:0 0 init_runtime:473 hash pg_idx 73 hash 0x2ffefdd8 page 0x29849000
D/TC:0 0 init_runtime:473 hash pg_idx 74 hash 0x2ffefdf8 page 0x2984a000
D/TC:0 0 init_runtime:473 hash pg_idx 75 hash 0x2ffefe18 page 0x2984b000
D/TC:0 0 init_runtime:473 hash pg_idx 76 hash 0x2ffefe38 page 0x2984c000
D/TC:0 0 init_runtime:473 hash pg_idx 77 hash 0x2ffefe58 page 0x2984d000
D/TC:0 0 init_runtime:473 hash pg_idx 78 hash 0x2ffefe78 page 0x2984e000
D/TC:0 0 init_runtime:473 hash pg_idx 79 hash 0x2ffefe98 page 0x2984f000
D/TC:0 0 init_runtime:473 hash pg_idx 80 hash 0x2ffefeb8 page 0x29850000
D/TC:0 0 init_runtime:473 hash pg_idx 81 hash 0x2ffefed8 page 0x29851000
D/TC:0 0 init_runtime:473 hash pg_idx 82 hash 0x2ffefef8 page 0x29852000
D/TC:0 0 init_runtime:473 hash pg_idx 83 hash 0x2ffeff18 page 0x29853000
D/TC:0 0 init_runtime:473 hash pg_idx 84 hash 0x2ffeff38 page 0x29854000
D/TC:0 0 init_runtime:473 hash pg_idx 85 hash 0x2ffeff58 page 0x29855000
D/TC:0 0 init_runtime:473 hash pg_idx 86 hash 0x2ffeff78 page 0x29856000
D/TC:0 0 init_runtime:473 hash pg_idx 87 hash 0x2ffeff98 page 0x29857000
D/TC:0 0 init_runtime:473 hash pg_idx 88 hash 0x2ffeffb8 page 0x29858000
D/TC:0 0 init_runtime:473 hash pg_idx 89 hash 0x2ffeffd8 page 0x29859000
D/TC:0 0 tee_pager_set_alias_area:388 0x30181000 - 0x301c0000
D/TC:0 0 tee_pager_add_core_region:633 0x2fff0000 - 0x3004a000 : type 0
D/TC:0 0 tee_pager_add_pages:1830 0x2fff0000 - 0x2fff4000 : 0
D/TC:0 0 pager_add_alias_page:572 0x2fff0000
D/TC:0 0 pager_add_alias_page:572 0x2fff1000
D/TC:0 0 pager_add_alias_page:572 0x2fff2000
D/TC:0 0 pager_add_alias_page:572 0x2fff3000
D/TC:0 0 tee_pager_add_pages:1830 0x2fff4000 - 0x3004a000 : 1
D/TC:0 0 pager_add_alias_page:572 0x2fff4000
D/TC:0 0 pager_add_alias_page:572 0x2fff5000
D/TC:0 0 pager_add_alias_page:572 0x2fff6000
D/TC:0 0 pager_add_alias_page:572 0x2fff7000
D/TC:0 0 pager_add_alias_page:572 0x2fff8000
D/TC:0 0 pager_add_alias_page:572 0x2fff9000
D/TC:0 0 pager_add_alias_page:572 0x2fffa000
D/TC:0 0 pager_add_alias_page:572 0x2fffb000
D/TC:0 0 pager_add_alias_page:572 0x2fffc000
D/TC:0 0 pager_add_alias_page:572 0x2fffd000
D/TC:0 0 pager_add_alias_page:572 0x2fffe000
D/TC:0 0 tee_pager_add_pages:1830 0x2ffc0000 - 0x2ffc0000 : 1
I/TC: Pager pool size: 56kB
D/TC:0 0 tee_pager_add_pages:1830 0x3004a000 - 0x3004d000 : 1
D/TC:0 0 tee_pager_add_core_region:633 0x3004b000 - 0x3004d000 : type 2
D/TC:0 0 tee_pager_add_pages:1830 0x3004d000 - 0x30050000 : 1
D/TC:0 0 tee_pager_add_core_region:633 0x3004e000 - 0x30050000 : type 2
D/TC:0 0 tee_pager_add_pages:1830 0x30050000 - 0x30053000 : 1
D/TC:0 0 tee_pager_add_core_region:633 0x30051000 - 0x30053000 : type 2
D/TC:0 0 tee_pager_add_core_region:633 0x30053000 - 0x30054000 : type 2
D/TC:0 0 tee_pager_add_core_region:633 0x30054000 - 0x30055000 : type 2
D/TC:0 0 tee_pager_add_core_region:633 0x30055000 - 0x30056000 : type 2
D/TC:0 0 tee_pager_add_core_region:633 0x30056000 - 0x30057000 : type 2
D/TC:0 0 tee_pager_add_core_region:633 0x30057000 - 0x30058000 : type 2
D/TC:0 0 tee_pager_add_core_region:633 0x30058000 - 0x30059000 : type 2
D/TC:0 0 stat_handle_fault:1740 nfaults 1 npages 14 (min 4294967295)
D/TC:0 0 stat_handle_fault:1740 nfaults 2 npages 13 (min 14)
I/TC: Non-secure external DT found
D/TC:0 0 carve_out_phys_mem:300 No need to carve out 0x2ffc0000 size 0x3f000
D/TC:0 0 dt_add_psci_node:781 PSCI Device Tree node already exists!
I/TC: Embedded DTB found
I/TC: OP-TEE version: 3.16.0-stm32mp-r1-4-g362656e6-dev (gcc version 11.3.1 20220604 [releases/gcc-11 revision 591c0f4b92548e3ae2e8173f4f93984b1c7f62bb] (GCC)) #1 Di 4. Okt 14:08:30 UTC 2022 arm
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html
I/TC: Primary CPU initializing
D/TC:0 0 call_preinitcalls:21 level 2 mobj_mapped_shm_init()
D/TC:0 0 mobj_mapped_shm_init:463 Shared memory address range: 2dc00000, 2fc00000
D/TC:0 0 call_initcalls:40 level 1 register_time_source()
D/TC:0 0 call_initcalls:40 level 1 teecore_init_pub_ram()
D/TC:0 0 call_initcalls:40 level 1 initialize_bsec()
D/TC:0 0 save_dt_nvmem_layout:860 nvmem[1] = cfg0_otp 0 8
D/TC:0 0 save_dt_nvmem_layout:860 nvmem[2] = part_number_otp 1 8
D/TC:0 0 save_dt_nvmem_layout:860 nvmem[3] = monotonic_otp 4 32
D/TC:0 0 save_dt_nvmem_layout:860 nvmem[4] = nand_otp 9 32
D/TC:0 0 save_dt_nvmem_layout:860 nvmem[5] = uid_otp 13 96
D/TC:0 0 save_dt_nvmem_layout:860 nvmem[6] = package_otp 16 32
D/TC:0 0 save_dt_nvmem_layout:860 nvmem[7] = hw2_otp 18 32
D/TC:0 0 save_dt_nvmem_layout:860 nvmem[8] = calib 23 16
D/TC:0 0 save_dt_nvmem_layout:844 Misaligned nvmem calib@5e: ignored
D/TC:0 0 save_dt_nvmem_layout:860 nvmem[9] = pkh_otp 24 256
D/TC:0 0 save_dt_nvmem_layout:860 nvmem[10] = mac 57 64
D/TC:0 0 save_dt_nvmem_layout:860 nvmem[11] = board_id 59 32
D/TC:0 0 call_initcalls:40 level 1 clk_dt_probe()
D/TC:0 0 clk_dt_probe:201 Probing clocks from devicetree
D/TC:0 0 get_osc_freq_from_dt:1436 Osc clk-hsi: 64000000 Hz
D/TC:0 0 get_osc_freq_from_dt:1436 Osc clk-hse: 24000000 Hz
D/TC:0 0 get_osc_freq_from_dt:1436 Osc clk-csi: 4000000 Hz
D/TC:0 0 get_osc_freq_from_dt:1436 Osc clk-lsi: 32000 Hz
D/TC:0 0 get_osc_freq_from_dt:1436 Osc clk-lse: 32768 Hz
D/TC:0 0 get_osc_freq_from_dt:1442 Osc i2s_ckin: no frequency info
D/TC:0 0 get_osc_freq_from_dt:1442 Osc ck_usbo_48m: no frequency info
D/TC:0 0 stm32mp1_clk_fdt_init:1475 Ignore source clocks configuration from DT
D/TC:0 0 stm32mp1_clk_fdt_init:1479 Ignore clock divisors configuration from DT
D/TC:0 0 stm32mp1_clk_fdt_init:1483 Ignore peripheral clocks tree configuration from DT
D/TC:0 0 stm32mp1_clk_fdt_init:1497 Ignore PLL1 configurations from DT
D/TC:0 0 stm32mp1_clk_fdt_init:1497 Ignore PLL2 configurations from DT
D/TC:0 0 stm32mp1_clk_fdt_init:1497 Ignore PLL3 configurations from DT
I/TC: DT clock tree configurations were ignored
D/TC:0 0 clk_register:108 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:108 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:108 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:108 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:108 Registered clock (null), freq 533000000
D/TC:0 0 clk_register:108 Registered clock (null), freq 533000000
D/TC:0 0 clk_register:108 Registered clock (null), freq 133250000
D/TC:0 0 clk_register:108 Registered clock (null), freq 133250000
D/TC:0 0 clk_register:108 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:108 Registered clock (null), freq 133250000
D/TC:0 0 clk_register:108 Registered clock (null), freq 133250000
D/TC:0 0 clk_register:108 Registered clock spi6, freq 64000000
D/TC:0 0 clk_register:108 Registered clock i2c4, freq 64000000
D/TC:0 0 clk_register:108 Registered clock i2c6, freq 64000000
D/TC:0 0 clk_register:108 Registered clock usart1, freq 64000000
D/TC:0 0 clk_register:108 Registered clock rtcapb, freq 66625000
D/TC:0 0 clk_register:108 Registered clock (null), freq 66625000
D/TC:0 0 clk_register:108 Registered clock (null), freq 66625000
D/TC:0 0 clk_register:108 Registered clock (null), freq 66625000
D/TC:0 0 clk_register:108 Registered clock iwdg, freq 66625000
D/TC:0 0 clk_register:108 Registered clock (null), freq 66625000
D/TC:0 0 clk_register:108 Registered clock (null), freq 24000000
D/TC:0 0 clk_register:108 Registered clock gpioz, freq 266500000
D/TC:0 0 clk_register:108 Registered clock crpy1, freq 266500000
D/TC:0 0 clk_register:108 Registered clock hash1, freq 266500000
D/TC:0 0 clk_register:108 Registered clock rng1, freq 32000
D/TC:0 0 clk_register:108 Registered clock bkpsram, freq 266500000
D/TC:0 0 clk_register:108 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:108 Registered clock rtc, freq 32768
D/TC:0 0 clk_register:108 Registered clock gpioa, freq 0
D/TC:0 0 clk_register:108 Registered clock gpiob, freq 0
D/TC:0 0 clk_register:108 Registered clock gpioc, freq 0
D/TC:0 0 clk_register:108 Registered clock gpiod, freq 0
D/TC:0 0 clk_register:108 Registered clock gpioe, freq 0
D/TC:0 0 clk_register:108 Registered clock gpiof, freq 0
D/TC:0 0 clk_register:108 Registered clock gpiog, freq 0
D/TC:0 0 clk_register:108 Registered clock gpioh, freq 0
D/TC:0 0 clk_register:108 Registered clock gpioi, freq 0
D/TC:0 0 clk_register:108 Registered clock gpioj, freq 0
D/TC:0 0 clk_register:108 Registered clock gpiok, freq 0
D/TC:0 0 clk_register:108 Registered clock (null), freq 208877928
D/TC:0 0 clk_register:108 Registered clock (null), freq 24000000
D/TC:0 0 clk_register:108 Registered clock (null), freq 24000000
D/TC:0 0 clk_register:108 Registered clock (null), freq 24000000
D/TC:0 0 clk_register:108 Registered clock (null), freq 24000000
D/TC:0 0 clk_register:108 Registered clock (null), freq 24000000
D/TC:0 0 clk_register:108 Registered clock (null), freq 24000000
D/TC:0 0 clk_register:108 Registered clock (null), freq 208877928
D/TC:0 0 clk_register:108 Registered clock (null), freq 24000000
D/TC:0 0 clk_register:108 Registered clock syscfg, freq 0
D/TC:0 0 clk_register:108 Registered clock (null), freq 0
D/TC:0 0 clk_register:108 Registered clock (null), freq 0
D/TC:0 0 clk_register:108 Registered clock dbg, freq 0
D/TC:0 0 clk_register:108 Registered clock hse, freq 24000000
D/TC:0 0 clk_register:108 Registered clock csi, freq 4000000
D/TC:0 0 clk_register:108 Registered clock lsi, freq 32000
D/TC:0 0 clk_register:108 Registered clock lse, freq 32768
D/TC:0 0 clk_register:108 Registered clock hsi, freq 64000000
D/TC:0 0 clk_register:108 Registered clock (null), freq 12000000
D/TC:0 0 clk_register:108 Registered clock (null), freq 650000000
D/TC:0 0 clk_register:108 Registered clock (null), freq 650000000
D/TC:0 0 clk_register:108 Registered clock (null), freq 650000000
D/TC:0 0 clk_register:108 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:108 Registered clock pll2q, freq 533000000
D/TC:0 0 clk_register:108 Registered clock pll2r, freq 533000000
D/TC:0 0 clk_register:108 Registered clock (null), freq 208877929
D/TC:0 0 clk_register:108 Registered clock pll3q, freq 24573874
D/TC:0 0 clk_register:108 Registered clock pll3r, freq 11290698
D/TC:0 0 clk_register:108 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:108 Registered clock (null), freq 650000000
D/TC:0 0 clk_register:108 Registered clock mcu, freq 208877929
D/TC:0 0 probe_driver_node:378 element: stm32mp1_clock on node rcc@50000000 initialized
D/TC:0 0 stat_handle_fault:1740 nfaults 1024 npages 13 (min 13)
D/TC:0 0 call_initcalls:40 level 2 init_debug()
D/TC:0 0 stm32_bsec_find_otp_in_nvmem_layout:655 nvmem cfg0_otp = 0: 0 8
I/TC: WARNING: All debug access are allowed
D/TC:0 0 call_initcalls:40 level 2 probe_dt_drivers_early()
D/TC:0 0 add_node_to_probe:573 element: cpu0-opp-table on node stm32mp1-cpu-opp
D/TC:0 0 add_node_to_probe:573 element: soc on node simple-bus
D/TC:0 0 add_node_to_probe:573 element: vin on node fixed-regulator
D/TC:0 0 probe_driver_node:378 element: fixed-regulator on node vin initialized
D/TC:0 0 add_node_to_probe:573 element: timer@44006000 on node stm32-timer
D/TC:0 0 stat_handle_fault:1740 nfaults 2048 npages 13 (min 13)
D/TC:0 0 add_node_to_probe:573 element: pwr@50001000 on node stm32mp1-pwr-regu
D/TC:0 0 add_node_to_probe:573 element: watchdog@5a002000 on node stm32-iwdg
D/TC:0 0 add_node_to_probe:573 element: rtc@5c004000 on node stm32-rtc
D/TC:0 0 add_node_to_probe:573 element: tamp@5c00a000 on node stm32-tamp
D/TC:0 0 add_node_to_probe:573 element: tzc@5c006000 on node stm32mp1-tzc400
D/TC:0 0 add_node_to_probe:573 element: pin-controller@50002000 on node stm32_gpio
D/TC:0 0 add_node_to_probe:573 element: pin-controller-z@54004000 on node stm32_gpio
D/TC:0 0 add_node_to_probe:573 element: etzpc@5c007000 on node stm32-etzpc
D/TC:0 0 probe_driver_node:378 element: simple-bus on node soc initialized
D/TC:0 0 regulator_get_by_phandle:54 phandle 4 not found
D/TC:0 0 probe_driver_node:384 element: stm32mp1-cpu-opp on node cpu0-opp-table deferred 1 time(s)
D/TC:0 0 regulator_get_by_phandle:54 phandle 4 not found
D/TC:0 0 probe_driver_node:384 element: stm32mp1-cpu-opp on node cpu0-opp-table deferred 2 time(s)
D/TC:0 0 stm32_etzpc_set_driverdata:512 ETZPC revision 0x32, per_sec 96, ahb_sec 0, tzma 2
D/TC:0 0 add_node_to_probe:573 element: rng@54003000 on node stm32_rng
D/TC:0 0 add_node_to_probe:573 element: i2c@5c002000 on node stm32_i2c
D/TC:0 0 probe_driver_node:378 element: stm32-etzpc on node etzpc@5c007000 initialized
D/TC:0 0 _fdt_stm32_gpio_controller:697 Bank name gpio@54004000
D/TC:0 0 _fdt_stm32_gpio_controller:717 GPIO bank Z assigned to non-secure
D/TC:0 0 stm32_gpio_probe:903 Registered GPIO bank Z (8 pins) @2c404000
D/TC:0 0 probe_driver_node:378 element: stm32_gpio on node pin-controller-z@54004000 initialized
D/TC:0 0 _fdt_stm32_gpio_controller:697 Bank name gpio@50002000
D/TC:0 0 _fdt_stm32_gpio_controller:697 Bank name gpio@50003000
D/TC:0 0 _fdt_stm32_gpio_controller:697 Bank name gpio@50004000
D/TC:0 0 _fdt_stm32_gpio_controller:697 Bank name gpio@50005000
D/TC:0 0 _fdt_stm32_gpio_controller:697 Bank name gpio@50006000
D/TC:0 0 stat_handle_fault:1740 nfaults 3072 npages 13 (min 13)
D/TC:0 0 _fdt_stm32_gpio_controller:697 Bank name gpio@50007000
D/TC:0 0 _fdt_stm32_gpio_controller:697 Bank name gpio@50008000
D/TC:0 0 _fdt_stm32_gpio_controller:697 Bank name gpio@50009000
D/TC:0 0 _fdt_stm32_gpio_controller:697 Bank name gpio@5000a000
D/TC:0 0 stm32_gpio_probe:903 Registered GPIO bank Z (8 pins) @2c404000
D/TC:0 0 stm32_gpio_probe:903 Registered GPIO bank A (16 pins) @2c802000
D/TC:0 0 stm32_gpio_probe:903 Registered GPIO bank B (16 pins) @2c803000
D/TC:0 0 stm32_gpio_probe:903 Registered GPIO bank C (16 pins) @2c804000
D/TC:0 0 stm32_gpio_probe:903 Registered GPIO bank D (16 pins) @2c805000
D/TC:0 0 stm32_gpio_probe:903 Registered GPIO bank E (16 pins) @2c806000
D/TC:0 0 stm32_gpio_probe:903 Registered GPIO bank F (16 pins) @2c807000
D/TC:0 0 stm32_gpio_probe:903 Registered GPIO bank G (16 pins) @2c808000
D/TC:0 0 stm32_gpio_probe:903 Registered GPIO bank H (16 pins) @2c809000
D/TC:0 0 stm32_gpio_probe:903 Registered GPIO bank I (12 pins) @2c80a000
D/TC:0 0 probe_driver_node:378 element: stm32_gpio on node pin-controller@50002000 initialized
D/TC:0 0 tzc_set_driverdata:113 TZC400 Filters 2 Regions 8
D/TC:0 0 stm32mp1_tzc_probe:482 0x0xc0000000 - 0x0xddffffff : Sec access 0 NS access 0x87fb87fb
D/TC:0 0 tzc_dump_state:473 region 0
D/TC:0 0 tzc_dump_state:476 region_base: 0x0000000000000000
D/TC:0 0 tzc_dump_state:479 region_top: 0x00000000ffffffff
D/TC:0 0 tzc_dump_state:481 secure rw: TZC_REGION_S_NONE
D/TC:0 0 tzc_dump_state:486 filter 0 enable
D/TC:0 0 tzc_dump_state:486 filter 1 enable
D/TC:0 0 tzc_dump_state:473 region 1
D/TC:0 0 tzc_dump_state:476 region_base: 0x00000000de200000
D/TC:0 0 tzc_dump_state:479 region_top: 0x00000000dfffffff
D/TC:0 0 tzc_dump_state:481 secure rw: TZC_REGION_S_RDWR
D/TC:0 0 tzc_dump_state:486 filter 0 enable
D/TC:0 0 tzc_dump_state:486 filter 1 enable
D/TC:0 0 tzc_dump_state:473 region 2
D/TC:0 0 tzc_dump_state:476 region_base: 0x00000000de000000
D/TC:0 0 tzc_dump_state:479 region_top: 0x00000000de1fffff
D/TC:0 0 tzc_dump_state:481 secure rw: TZC_REGION_S_NONE
D/TC:0 0 tzc_dump_state:486 filter 0 enable
D/TC:0 0 tzc_dump_state:486 filter 1 enable
D/TC:0 0 tzc_dump_state:473 region 3
D/TC:0 0 tzc_dump_state:476 region_base: 0x00000000c0000000
D/TC:0 0 tzc_dump_state:479 region_top: 0x00000000ddffffff
D/TC:0 0 tzc_dump_state:481 secure rw: TZC_REGION_S_NONE
D/TC:0 0 tzc_dump_state:486 filter 0 enable
D/TC:0 0 tzc_dump_state:486 filter 1 enable
D/TC:0 0 gic_it_set_cpu_mask:330 cpu_mask: writing 0xff to 0x2ba21824
D/TC:0 0 gic_it_set_cpu_mask:332 cpu_mask: 0x3
D/TC:0 0 gic_it_set_prio:341 prio: writing 0x1 to 0x2ba21424
D/TC:0 0 probe_driver_node:378 element: stm32mp1-tzc400 on node tzc@5c006000 initialized
D/TC:0 0 stm32_tamp_parse_passive_conf:1083 Passive conf from dt: precharge=0, nb_sample=0, clk_div=32768
D/TC:0 0 stm32_tamp_parse_active_conf:1199 Active conf from dt: no filter clk_div=1
D/TC:0 0 gic_it_set_cpu_mask:330 cpu_mask: writing 0xff00 to 0x2ba218e4
D/TC:0 0 gic_it_set_cpu_mask:332 cpu_mask: 0x300
D/TC:0 0 gic_it_set_prio:341 prio: writing 0x1 to 0x2ba214e5
D/TC:0 0 probe_driver_node:378 element: stm32-tamp on node tamp@5c00a000 initialized
D/TC:0 0 probe_driver_node:378 element: stm32-rtc on node rtc@5c004000 initialized
D/TC:0 0 stm32mp_iwdg_iomem2instance:505 Base 5a002000
D/TC:0 0 stm32_bsec_find_otp_in_nvmem_layout:655 nvmem hw2_otp = 6: 18 32
D/TC:0 0 gic_it_set_cpu_mask:330 cpu_mask: writing 0xff000000 to 0x2ba218b4
D/TC:0 0 gic_it_set_cpu_mask:332 cpu_mask: 0x3000000
D/TC:0 0 gic_it_set_prio:341 prio: writing 0x1 to 0x2ba214b7
D/TC:0 0 probe_driver_node:378 element: stm32-iwdg on node watchdog@5a002000 initialized
D/TC:0 0 probe_driver_node:378 element: stm32mp1-pwr-regu on node pwr@50001000 initialized
D/TC:0 0 probe_driver_node:378 element: stm32-timer on node timer@44006000 initialized
D/TC:0 0 i2c_compute_timing:453 I2C SDADEL(min/max): 18/519, SCLDEL(Min): 285
D/TC:0 0 i2c_compute_timing:551 I2C TIMINGR (PRESC/SCLDEL/SDADEL): 1/8/1
D/TC:0 0 i2c_compute_timing:553 I2C TIMINGR (SCLH/SCLL): 27/38
D/TC:0 0 i2c_compute_timing:555 I2C TIMINGR: 0x10811b26
D/TC:0 0 i2c_setup_timing:642 I2C Freq(400000Hz), Clk Source(64000000)
D/TC:0 0 i2c_setup_timing:644 I2C Rise(185) and Fall(20) Time
D/TC:0 0 i2c_setup_timing:646 I2C Analog Filter(On), DNF(0)
D/TC:0 0 add_node_to_probe:573 element: stpmic@33 on node stm32_pmic
D/TC:0 0 probe_driver_node:378 element: stm32_i2c on node i2c@5c002000 initialized
D/TC:0 0 register_periph:172 Register RNG1 as secure
D/TC:0 0 probe_driver_node:378 element: stm32_rng on node rng@54003000 initialized
D/TC:0 0 regulator_get_by_phandle:54 phandle 4 not found
D/TC:0 0 probe_driver_node:384 element: stm32mp1-cpu-opp on node cpu0-opp-table deferred 3 time(s)
D/TC:0 0 regulator_get_by_phandle:54 phandle 4 not found
D/TC:0 0 probe_driver_node:384 element: stm32mp1-cpu-opp on node cpu0-opp-table deferred 4 time(s)
D/TC:0 0 register_periph:172 Register I2C4 as non-secure
D/TC:0 0 initialize_pmic:570 PMIC version = 0x21
D/TC:0 0 stpmic1_dump_regulators:1136 PMIC regul buck1: enable, 1200mV
D/TC:0 0 stpmic1_dump_regulators:1136 PMIC regul buck2: enable, 1350mV
D/TC:0 0 stpmic1_dump_regulators:1136 PMIC regul buck3: enable, 3300mV
D/TC:0 0 stpmic1_dump_regulators:1136 PMIC regul buck4: enable, 3300mV
D/TC:0 0 stpmic1_dump_regulators:1136 PMIC regul ldo1: disable, 1800mV
D/TC:0 0 stpmic1_dump_regulators:1136 PMIC regul ldo2: disable, 1800mV
D/TC:0 0 stpmic1_dump_regulators:1136 PMIC regul ldo3: enable, 3300mV
D/TC:0 0 stpmic1_dump_regulators:1136 PMIC regul ldo4: enable, 3300mV
D/TC:0 0 stpmic1_dump_regulators:1136 PMIC regul ldo5: enable, 2900mV
D/TC:0 0 stpmic1_dump_regulators:1136 PMIC regul ldo6: disable, 1000mV
D/TC:0 0 stpmic1_dump_regulators:1136 PMIC regul vref_ddr: enable, 3300mV
D/TC:0 0 stpmic1_dump_regulators:1136 PMIC regul boost: disable, 5000mV
D/TC:0 0 stpmic1_dump_regulators:1136 PMIC regul pwr_sw1: disable, 5000mV
D/TC:0 0 stpmic1_dump_regulators:1136 PMIC regul pwr_sw2: disable, 5000mV
D/TC:0 0 stat_handle_fault:1740 nfaults 4096 npages 13 (min 13)
D/TC:0 0 probe_driver_node:378 element: stm32_pmic on node stpmic@33 initialized
D/TC:0 0 stm32_bsec_find_otp_in_nvmem_layout:655 nvmem part_number_otp = 1: 1 8
D/TC:0 0 stm32mp1_cpu_opp_get_dt_subnode:265 Found OPP 0 (650000kHz/1200mV) from DT
D/TC:0 0 probe_driver_node:378 element: stm32mp1-cpu-opp on node cpu0-opp-table initialized
D/TC:0 0 call_initcalls:40 level 3 platform_banner()
I/TC: Platform stm32mp1: flavor PLATFORM_FLAVOR - DT stm32mp157c-mymodel.dts
D/TC:0 0 call_initcalls:40 level 3 check_ta_store()
D/TC:0 0 check_ta_store:408 TA store: "early TA"
D/TC:0 0 check_ta_store:408 TA store: "Secure Storage TA"
D/TC:0 0 check_ta_store:408 TA store: "REE"
D/TC:0 0 call_initcalls:40 level 3 early_ta_init()
D/TC:0 0 early_ta_init:56 Early TA 1a8342cc-81a5-4512-99fe-9e2b3e37d626 size 42740
D/TC:0 0 call_initcalls:40 level 3 verify_pseudo_tas_conformance()
D/TC:0 0 call_initcalls:40 level 3 mobj_init()
D/TC:0 0 call_initcalls:40 level 3 default_mobj_init()
D/TC:0 0 call_initcalls:40 level 3 tee_cryp_init()
D/TC:0 0 tee_pager_add_core_region:633 0x30059000 - 0x30065000 : type 2
D/TC:0 0 call_initcalls:40 level 4 init_console_from_dt()
D/TC:0 0 register_periph_iomem:271 IO for non-secure resource 0x40010000
I/TC: DTB enables console (non-secure)
D/TC:0 0 call_initcalls:40 level 4 tee_fs_init_key_manager()
D/TC:0 0 call_initcalls:40 level 5 stm32mp1_iocomp()
D/TC:0 0 call_initcalls:40 level 5 init_pm_support()
D/TC:0 0 call_initcalls:40 level 5 probe_dt_drivers()
D/TC:0 0 call_initcalls:40 level 6 stm32_configure_tamp()
D/TC:0 0 stm32_tamp_set_int_config:412 INT_TAMP1 enabled as a full tamper
D/TC:0 0 stm32_tamp_set_int_config:412 INT_TAMP2 enabled as a full tamper
D/TC:0 0 stm32_tamp_set_int_config:412 INT_TAMP3 enabled as a full tamper
D/TC:0 0 stm32_tamp_set_int_config:412 INT_TAMP4 enabled as a full tamper
D/TC:0 0 call_initcalls:40 level 6 init_stm32mp1_drivers()
D/TC:0 0 call_initcalls:40 level 6 stm32mp1_init_scmi_server()
D/TC:0 0 call_initcalls:40 level 6 stm32mp1_init_final_shres()
D/TC:0 0 stm32mp1_init_final_shres:524 stm32mp IWDG1    ( 0): unregistered  
D/TC:0 0 stm32mp1_init_final_shres:524 stm32mp USART1   ( 1): unregistered  
D/TC:0 0 stm32mp1_init_final_shres:524 stm32mp SPI6     ( 2): non-secure    
D/TC:0 0 stm32mp1_init_final_shres:524 stm32mp I2C4     ( 3): non-secure    
D/TC:0 0 stm32mp1_init_final_shres:524 stm32mp RNG1     ( 4): secure        
D/TC:0 0 stm32mp1_init_final_shres:524 stm32mp HASH1    ( 5): unregistered  
D/TC:0 0 stm32mp1_init_final_shres:524 stm32mp CRYP1    ( 6): unregistered  
D/TC:0 0 stm32mp1_init_final_shres:524 stm32mp I2C6     ( 7): unregistered  
D/TC:0 0 stm32mp1_init_final_shres:524 stm32mp RTC      ( 8): unregistered  
D/TC:0 0 stm32mp1_init_final_shres:524 stm32mp MCU      ( 9): unregistered  
D/TC:0 0 stm32mp1_init_final_shres:524 stm32mp PLL3     (10): unregistered  
D/TC:0 0 stm32mp1_init_final_shres:524 stm32mp MDMA     (11): unregistered  
D/TC:0 0 stm32_bsec_find_otp_in_nvmem_layout:655 nvmem cfg0_otp = 0: 0 8
D/TC:0 0 check_rcc_secure_configuration:506 RCC/PWR secure hardening: TZEN enable, MCKPROT enable
D/TC:0 0 call_initcalls:40 level 6 init_stm32mp1_calib()
D/TC:0 0 init_stm32mp1_calib:547 Calibration csi-calibration enabled
D/TC:0 0 init_stm32mp1_calib:547 Calibration hsi-calibration enabled
D/TC:0 0 osc_calibration:305 Calibration : Freq 63885312 , trim 270
D/TC:0 0 osc_calibration:305 Calibration : Freq 4013824 , trim 102
D/TC:0 0 call_initcalls:40 level 6 stm32mp_syscfg_set_hslv()
D/TC:0 0 stm32_bsec_find_otp_in_nvmem_layout:655 nvmem hw2_otp = 6: 18 32
D/TC:0 0 call_initcalls:40 level 6 init_low_power()
D/TC:0 0 gic_it_set_cpu_mask:330 cpu_mask: writing 0xff00 to 0x2ba218b0
D/TC:0 0 gic_it_set_cpu_mask:332 cpu_mask: 0x300
D/TC:0 0 gic_it_set_prio:341 prio: writing 0x1 to 0x2ba214b1
D/TC:0 0 gic_it_set_cpu_mask:330 cpu_mask: writing 0x101ff01 to 0x2ba21808
D/TC:0 0 gic_it_set_cpu_mask:332 cpu_mask: 0x1010101
D/TC:0 0 gic_it_set_prio:341 prio: writing 0x1 to 0x2ba21409
D/TC:0 0 call_initcalls:40 level 6 stm32mp1_init_lp_states()
D/TC:0 0 stm32mp1_init_lp_states:236 Power configuration: shutdown to 6, suspend to 2
D/TC:0 0 call_initcalls:40 level 6 regulator_core_init()
D/TC:0 0 call_initcalls:40 level 6 scmi_regulator_consumer_init()
D/TC:0 0 scmi_regulator_consumer_init:348 scmi voltd shares reg11 (node reg11) on domain ID 0
D/TC:0 0 scmi_regulator_consumer_init:348 scmi voltd shares reg18 (node reg18) on domain ID 1
D/TC:0 0 scmi_regulator_consumer_init:348 scmi voltd shares usb33 (node usb33) on domain ID 2
D/TC:0 0 call_initcalls:40 level 6 rwp_init()
D/TC:0 0 tee_pager_add_core_region:633 0x30065000 - 0x300a1000 : type 1
D/TC:0 0 call_initcalls:40 level 7 regulator_core_cleanup()
D/TC:0 0 regulator_core_cleanup:1009 disable pwr_sw2
D/TC:0 0 regulator_core_cleanup:1009 disable pwr_sw1
D/TC:0 0 regulator_core_cleanup:1009 disable boost
D/TC:0 0 regulator_core_cleanup:1009 disable ldo6
D/TC:0 0 regulator_core_cleanup:1009 disable ldo5
D/TC:0 0 regulator_core_cleanup:1009 disable ldo2
D/TC:0 0 regulator_core_cleanup:1009 disable ldo1
D/TC:0 0 regulator_core_cleanup:1009 disable usb33
D/TC:0 0 regulator_core_cleanup:1009 disable reg18
D/TC:0 0 regulator_core_cleanup:1009 disable reg11
D/TC:0 0 call_initcalls:40 level 7 release_probe_lists()
D/TC:0 0 call_finalcalls:59 level 1 release_external_dt()
I/TC: Primary CPU switching to normal world boot

jforissier commented 2 years ago

Hi @coveritytest,

Was it working before or is it the first time you're trying to run OP-TEE on this board? If it is a regression, have you tried git bisect?

coveritytest commented 2 years ago

It's the first time I'm trying to run OP-TEE on this board. Using almost the same DT as the STM32MP157C-DK2 board for TF-A, OP-TEE and U-Boot.

Comparing this to an apparently working boot log with v3.17 I'm missing

I/TC: RCC is non-secure

on my board, also I see the messages:

I/TC: DT clock tree configurations were ignored D/TC:0 0 stm32mp1_clk_fdt_init:1475 Ignore source clocks configuration from DT D/TC:0 0 stm32mp1_clk_fdt_init:1479 Ignore clock divisors configuration from DT D/TC:0 0 stm32mp1_clk_fdt_init:1483 Ignore peripheral clocks tree configuration from DT D/TC:0 0 stm32mp1_clk_fdt_init:1497 Ignore PLL1 configurations from DT D/TC:0 0 stm32mp1_clk_fdt_init:1497 Ignore PLL2 configurations from DT D/TC:0 0 stm32mp1_clk_fdt_init:1497 Ignore PLL3 configurations from DT

on my board.

I/TC: Early console on UART#4
D/TC:0   add_phys_mem:556 ROUNDDOWN(0xa0021000ul, CORE_MMU_PGDIR_SIZE) type IO_SEC 0xa0000000 size 0x00200000
D/TC:0   add_phys_mem:556 ROUNDDOWN(0x54000000, CORE_MMU_PGDIR_SIZE) type IO_SEC 0x54000000 size 0x00200000
D/TC:0   add_phys_mem:556 ROUNDDOWN(0x50000000, CORE_MMU_PGDIR_SIZE) type IO_SEC 0x50000000 size 0x00200000
D/TC:0   add_phys_mem:556 ROUNDDOWN(0x5c000000, CORE_MMU_PGDIR_SIZE) type IO_SEC 0x5c000000 size 0x00200000
D/TC:0   add_phys_mem:556 ROUNDDOWN(0x5a000000, CORE_MMU_PGDIR_SIZE) type IO_SEC 0x5a000000 size 0x00200000
D/TC:0   add_phys_mem:556 ROUNDDOWN(0x50020000, CORE_MMU_PGDIR_SIZE) type IO_SEC 0x50000000 size 0x00200000
D/TC:0   add_phys_mem:569 Physical mem map overlaps 0x50000000
D/TC:0   add_phys_mem:556 ROUNDDOWN(0x54000000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x54000000 size 0x00200000
D/TC:0   add_phys_mem:556 ROUNDDOWN(0x50000000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x50000000 size 0x00200000
D/TC:0   add_phys_mem:556 ROUNDDOWN(0x5c000000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x5c000000 size 0x00200000
D/TC:0   add_phys_mem:556 ROUNDDOWN(0x5a000000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x5a000000 size 0x00200000
D/TC:0   add_phys_mem:556 ROUNDDOWN(0x50020000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x50000000 size 0x00200000
D/TC:0   add_phys_mem:569 Physical mem map overlaps 0x50000000
D/TC:0   add_phys_mem:556 ROUNDDOWN(0x44000000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x44000000 size 0x00200000
D/TC:0   add_phys_mem:556 ROUNDDOWN(0x40000000, CORE_MMU_PGDIR_SIZE) type IO_NSEC 0x40000000 size 0x00200000
D/TC:0   add_phys_mem:556 CFG_STM32MP1_SCMI_SHM_BASE type IO_NSEC 0x2ffff000 size 0x00001000
D/TC:0   add_phys_mem:556 TEE_SHMEM_START type NSEC_SHM 0xdfe00000 size 0x00200000
D/TC:0   add_phys_mem:556 TA_RAM_START type TA_RAM 0xde000000 size 0x01e00000
D/TC:0   add_phys_mem:556 VCORE_INIT_RX_PA type INIT_RAM_RX 0x2ffe7000 size 0x00018000
D/TC:0   add_phys_mem:556 VCORE_UNPG_RW_PA type TEE_RAM_RW 0x2ffcb000 size 0x0001c000
D/TC:0   add_phys_mem:556 VCORE_UNPG_RX_PA type TEE_RAM_RX 0x2ffc0000 size 0x0000b000
D/TC:0   add_va_space:595 type RES_VASPACE size 0x00a00000
D/TC:0   add_va_space:595 type SHM_VASPACE size 0x02000000
D/TC:0   dump_mmap_table:723 type NSEC_SHM     va 0x29800000..0x299fffff pa 0xdfe00000..0xdfffffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:723 type TA_RAM       va 0x29a00000..0x2b7fffff pa 0xde000000..0xdfdfffff size 0x01e00000 (pgdir)
D/TC:0   dump_mmap_table:723 type IO_SEC       va 0x2ba00000..0x2bbfffff pa 0xa0000000..0xa01fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:723 type IO_NSEC      va 0x2bc00000..0x2bdfffff pa 0x5c000000..0x5c1fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:723 type IO_SEC       va 0x2be00000..0x2bffffff pa 0x5c000000..0x5c1fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:723 type IO_SEC       va 0x2c000000..0x2c1fffff pa 0x5a000000..0x5a1fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:723 type IO_NSEC      va 0x2c200000..0x2c3fffff pa 0x5a000000..0x5a1fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:723 type IO_SEC       va 0x2c400000..0x2c5fffff pa 0x54000000..0x541fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:723 type IO_NSEC      va 0x2c600000..0x2c7fffff pa 0x54000000..0x541fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:723 type IO_NSEC      va 0x2c800000..0x2c9fffff pa 0x50000000..0x501fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:723 type IO_SEC       va 0x2ca00000..0x2cbfffff pa 0x50000000..0x501fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:723 type IO_NSEC      va 0x2cc00000..0x2cdfffff pa 0x44000000..0x441fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:723 type IO_NSEC      va 0x2ce00000..0x2cffffff pa 0x40000000..0x401fffff size 0x00200000 (pgdir)
D/TC:0   dump_mmap_table:723 type RES_VASPACE  va 0x2d000000..0x2d9fffff pa 0x00000000..0x009fffff size 0x00a00000 (pgdir)
D/TC:0   dump_mmap_table:723 type SHM_VASPACE  va 0x2dc00000..0x2fbfffff pa 0x00000000..0x01ffffff size 0x02000000 (pgdir)
D/TC:0   dump_mmap_table:723 type IO_NSEC      va 0x2ffbf000..0x2ffbffff pa 0x2ffff000..0x2fffffff size 0x00001000 (smallpg)
D/TC:0   dump_mmap_table:723 type TEE_RAM_RX   va 0x2ffc0000..0x2ffcafff pa 0x2ffc0000..0x2ffcafff size 0x0000b000 (smallpg)
D/TC:0   dump_mmap_table:723 type TEE_RAM_RW   va 0x2ffcb000..0x2ffe6fff pa 0x2ffcb000..0x2ffe6fff size 0x0001c000 (smallpg)
D/TC:0   dump_mmap_table:723 type INIT_RAM_RX  va 0x2ffe7000..0x2fffefff pa 0x2ffe7000..0x2fffefff size 0x00018000 (smallpg)
D/TC:0   dump_mmap_table:723 type PAGER_VASPACE va 0x2ffff000..0x301bffff pa 0x00000000..0x001c0fff size 0x001c1000 (smallpg)
D/TC:0   core_mmu_xlat_table_alloc:519 xlat tables used 1 / 5
D/TC:0   core_mmu_xlat_table_alloc:519 xlat tables used 2 / 5
D/TC:0   core_mmu_xlat_table_alloc:519 xlat tables used 3 / 5
I/TC: 
I/TC: Pager is enabled. Hashes: 2400 bytes
D/TC:0 0 init_runtime:476 Checking hashes of pageable area
D/TC:0 0 init_runtime:482 hash pg_idx 0 hash 0x2ffcd628 page 0x29a00000
D/TC:0 0 init_runtime:482 hash pg_idx 1 hash 0x2ffcd648 page 0x29a01000
D/TC:0 0 init_runtime:482 hash pg_idx 2 hash 0x2ffcd668 page 0x29a02000
D/TC:0 0 init_runtime:482 hash pg_idx 3 hash 0x2ffcd688 page 0x29a03000
D/TC:0 0 init_runtime:482 hash pg_idx 4 hash 0x2ffcd6a8 page 0x29a04000
D/TC:0 0 init_runtime:482 hash pg_idx 5 hash 0x2ffcd6c8 page 0x29a05000
D/TC:0 0 init_runtime:482 hash pg_idx 6 hash 0x2ffcd6e8 page 0x29a06000
D/TC:0 0 init_runtime:482 hash pg_idx 7 hash 0x2ffcd708 page 0x29a07000
D/TC:0 0 init_runtime:482 hash pg_idx 8 hash 0x2ffcd728 page 0x29a08000
D/TC:0 0 init_runtime:482 hash pg_idx 9 hash 0x2ffcd748 page 0x29a09000
D/TC:0 0 init_runtime:482 hash pg_idx 10 hash 0x2ffcd768 page 0x29a0a000
D/TC:0 0 init_runtime:482 hash pg_idx 11 hash 0x2ffcd788 page 0x29a0b000
D/TC:0 0 init_runtime:482 hash pg_idx 12 hash 0x2ffcd7a8 page 0x29a0c000
D/TC:0 0 init_runtime:482 hash pg_idx 13 hash 0x2ffcd7c8 page 0x29a0d000
D/TC:0 0 init_runtime:482 hash pg_idx 14 hash 0x2ffcd7e8 page 0x29a0e000
D/TC:0 0 init_runtime:482 hash pg_idx 15 hash 0x2ffcd808 page 0x29a0f000
D/TC:0 0 init_runtime:482 hash pg_idx 16 hash 0x2ffcd828 page 0x29a10000
D/TC:0 0 init_runtime:482 hash pg_idx 17 hash 0x2ffcd848 page 0x29a11000
D/TC:0 0 init_runtime:482 hash pg_idx 18 hash 0x2ffcd868 page 0x29a12000
D/TC:0 0 init_runtime:482 hash pg_idx 19 hash 0x2ffcd888 page 0x29a13000
D/TC:0 0 init_runtime:482 hash pg_idx 20 hash 0x2ffcd8a8 page 0x29a14000
D/TC:0 0 init_runtime:482 hash pg_idx 21 hash 0x2ffcd8c8 page 0x29a15000
D/TC:0 0 init_runtime:482 hash pg_idx 22 hash 0x2ffcd8e8 page 0x29a16000
D/TC:0 0 init_runtime:482 hash pg_idx 23 hash 0x2ffcd908 page 0x29a17000
D/TC:0 0 init_runtime:482 hash pg_idx 24 hash 0x2ffcd928 page 0x29a18000
D/TC:0 0 init_runtime:482 hash pg_idx 25 hash 0x2ffcd948 page 0x29a19000
D/TC:0 0 init_runtime:482 hash pg_idx 26 hash 0x2ffcd968 page 0x29a1a000
D/TC:0 0 init_runtime:482 hash pg_idx 27 hash 0x2ffcd988 page 0x29a1b000
D/TC:0 0 init_runtime:482 hash pg_idx 28 hash 0x2ffcd9a8 page 0x29a1c000
D/TC:0 0 init_runtime:482 hash pg_idx 29 hash 0x2ffcd9c8 page 0x29a1d000
D/TC:0 0 init_runtime:482 hash pg_idx 30 hash 0x2ffcd9e8 page 0x29a1e000
D/TC:0 0 init_runtime:482 hash pg_idx 31 hash 0x2ffcda08 page 0x29a1f000
D/TC:0 0 init_runtime:482 hash pg_idx 32 hash 0x2ffcda28 page 0x29a20000
D/TC:0 0 init_runtime:482 hash pg_idx 33 hash 0x2ffcda48 page 0x29a21000
D/TC:0 0 init_runtime:482 hash pg_idx 34 hash 0x2ffcda68 page 0x29a22000
D/TC:0 0 init_runtime:482 hash pg_idx 35 hash 0x2ffcda88 page 0x29a23000
D/TC:0 0 init_runtime:482 hash pg_idx 36 hash 0x2ffcdaa8 page 0x29a24000
D/TC:0 0 init_runtime:482 hash pg_idx 37 hash 0x2ffcdac8 page 0x29a25000
D/TC:0 0 init_runtime:482 hash pg_idx 38 hash 0x2ffcdae8 page 0x29a26000
D/TC:0 0 init_runtime:482 hash pg_idx 39 hash 0x2ffcdb08 page 0x29a27000
D/TC:0 0 init_runtime:482 hash pg_idx 40 hash 0x2ffcdb28 page 0x29a28000
D/TC:0 0 init_runtime:482 hash pg_idx 41 hash 0x2ffcdb48 page 0x29a29000
D/TC:0 0 init_runtime:482 hash pg_idx 42 hash 0x2ffcdb68 page 0x29a2a000
D/TC:0 0 init_runtime:482 hash pg_idx 43 hash 0x2ffcdb88 page 0x29a2b000
D/TC:0 0 init_runtime:482 hash pg_idx 44 hash 0x2ffcdba8 page 0x29a2c000
D/TC:0 0 init_runtime:482 hash pg_idx 45 hash 0x2ffcdbc8 page 0x29a2d000
D/TC:0 0 init_runtime:482 hash pg_idx 46 hash 0x2ffcdbe8 page 0x29a2e000
D/TC:0 0 init_runtime:482 hash pg_idx 47 hash 0x2ffcdc08 page 0x29a2f000
D/TC:0 0 init_runtime:482 hash pg_idx 48 hash 0x2ffcdc28 page 0x29a30000
D/TC:0 0 init_runtime:482 hash pg_idx 49 hash 0x2ffcdc48 page 0x29a31000
D/TC:0 0 init_runtime:482 hash pg_idx 50 hash 0x2ffcdc68 page 0x29a32000
D/TC:0 0 init_runtime:482 hash pg_idx 51 hash 0x2ffcdc88 page 0x29a33000
D/TC:0 0 init_runtime:482 hash pg_idx 52 hash 0x2ffcdca8 page 0x29a34000
D/TC:0 0 init_runtime:482 hash pg_idx 53 hash 0x2ffcdcc8 page 0x29a35000
D/TC:0 0 init_runtime:482 hash pg_idx 54 hash 0x2ffcdce8 page 0x29a36000
D/TC:0 0 init_runtime:482 hash pg_idx 55 hash 0x2ffcdd08 page 0x29a37000
D/TC:0 0 init_runtime:482 hash pg_idx 56 hash 0x2ffcdd28 page 0x29a38000
D/TC:0 0 init_runtime:482 hash pg_idx 57 hash 0x2ffcdd48 page 0x29a39000
D/TC:0 0 init_runtime:482 hash pg_idx 58 hash 0x2ffcdd68 page 0x29a3a000
D/TC:0 0 init_runtime:482 hash pg_idx 59 hash 0x2ffcdd88 page 0x29a3b000
D/TC:0 0 init_runtime:482 hash pg_idx 60 hash 0x2ffcdda8 page 0x29a3c000
D/TC:0 0 init_runtime:482 hash pg_idx 61 hash 0x2ffcddc8 page 0x29a3d000
D/TC:0 0 init_runtime:482 hash pg_idx 62 hash 0x2ffcdde8 page 0x29a3e000
D/TC:0 0 init_runtime:482 hash pg_idx 63 hash 0x2ffcde08 page 0x29a3f000
D/TC:0 0 init_runtime:482 hash pg_idx 64 hash 0x2ffcde28 page 0x29a40000
D/TC:0 0 init_runtime:482 hash pg_idx 65 hash 0x2ffcde48 page 0x29a41000
D/TC:0 0 init_runtime:482 hash pg_idx 66 hash 0x2ffcde68 page 0x29a42000
D/TC:0 0 init_runtime:482 hash pg_idx 67 hash 0x2ffcde88 page 0x29a43000
D/TC:0 0 init_runtime:482 hash pg_idx 68 hash 0x2ffcdea8 page 0x29a44000
D/TC:0 0 init_runtime:482 hash pg_idx 69 hash 0x2ffcdec8 page 0x29a45000
D/TC:0 0 init_runtime:482 hash pg_idx 70 hash 0x2ffcdee8 page 0x29a46000
D/TC:0 0 init_runtime:482 hash pg_idx 71 hash 0x2ffcdf08 page 0x29a47000
D/TC:0 0 init_runtime:482 hash pg_idx 72 hash 0x2ffcdf28 page 0x29a48000
D/TC:0 0 init_runtime:482 hash pg_idx 73 hash 0x2ffcdf48 page 0x29a49000
D/TC:0 0 init_runtime:482 hash pg_idx 74 hash 0x2ffcdf68 page 0x29a4a000
D/TC:0 0 tee_pager_set_alias_area:388 0x30181000 - 0x301c0000
D/TC:0 0 tee_pager_add_core_region:634 0x2ffe7000 - 0x30032000 : type 0
D/TC:0 0 tee_pager_add_pages:1831 0x2ffe7000 - 0x2ffeb000 : 0
D/TC:0 0 pager_add_alias_page:572 0x2ffe7000
D/TC:0 0 pager_add_alias_page:572 0x2ffe8000
D/TC:0 0 pager_add_alias_page:572 0x2ffe9000
D/TC:0 0 pager_add_alias_page:572 0x2ffea000
D/TC:0 0 tee_pager_add_pages:1831 0x2ffeb000 - 0x30032000 : 1
D/TC:0 0 pager_add_alias_page:572 0x2ffeb000
D/TC:0 0 pager_add_alias_page:572 0x2ffec000
D/TC:0 0 pager_add_alias_page:572 0x2ffed000
D/TC:0 0 pager_add_alias_page:572 0x2ffee000
D/TC:0 0 pager_add_alias_page:572 0x2ffef000
D/TC:0 0 pager_add_alias_page:572 0x2fff0000
D/TC:0 0 pager_add_alias_page:572 0x2fff1000
D/TC:0 0 pager_add_alias_page:572 0x2fff2000
D/TC:0 0 pager_add_alias_page:572 0x2fff3000
D/TC:0 0 pager_add_alias_page:572 0x2fff4000
D/TC:0 0 pager_add_alias_page:572 0x2fff5000
D/TC:0 0 pager_add_alias_page:572 0x2fff6000
D/TC:0 0 pager_add_alias_page:572 0x2fff7000
D/TC:0 0 pager_add_alias_page:572 0x2fff8000
D/TC:0 0 pager_add_alias_page:572 0x2fff9000
D/TC:0 0 pager_add_alias_page:572 0x2fffa000
D/TC:0 0 pager_add_alias_page:572 0x2fffb000
D/TC:0 0 pager_add_alias_page:572 0x2fffc000
D/TC:0 0 pager_add_alias_page:572 0x2fffd000
D/TC:0 0 pager_add_alias_page:572 0x2fffe000
D/TC:0 0 tee_pager_add_pages:1831 0x2ffc0000 - 0x2ffc0000 : 1
I/TC: Pager pool size: 92kB
D/TC:0 0 tee_pager_add_pages:1831 0x30032000 - 0x30035000 : 1
D/TC:0 0 tee_pager_add_core_region:634 0x30033000 - 0x30035000 : type 2
D/TC:0 0 tee_pager_add_pages:1831 0x30035000 - 0x30038000 : 1
D/TC:0 0 tee_pager_add_core_region:634 0x30036000 - 0x30038000 : type 2
D/TC:0 0 tee_pager_add_core_region:634 0x30038000 - 0x30039000 : type 2
D/TC:0 0 tee_pager_add_core_region:634 0x30039000 - 0x3003a000 : type 2
D/TC:0 0 tee_pager_add_core_region:634 0x3003a000 - 0x3003b000 : type 2
D/TC:0 0 tee_pager_add_core_region:634 0x3003b000 - 0x3003c000 : type 2
I/TC: Non-secure external DT found
D/TC:0 0 carve_out_phys_mem:284 No need to carve out 0x2ffc0000 size 0x3f000
D/TC:0 0 dt_add_psci_node:785 PSCI Device Tree node already exists!
I/TC: Embedded DTB found
I/TC: OP-TEE version: 3.17.0 (gcc version 8.3.0 (GNU Toolchain for the A-profile Architecture 8.3-2019.03 (arm-rel-8.36))) #1 mar. 19m
I/TC: WARNING: This OP-TEE configuration might be insecure!
I/TC: WARNING: Please check https://optee.readthedocs.io/en/latest/architecture/porting_guidelines.html
I/TC: Primary CPU initializing
D/TC:0 0 call_preinitcalls:21 level 2 mobj_mapped_shm_init()
D/TC:0 0 mobj_mapped_shm_init:464 Shared memory address range: 2dc00000, 2fc00000
D/TC:0 0 call_initcalls:40 level 1 register_time_source()
D/TC:0 0 call_initcalls:40 level 1 initialize_bsec()
D/TC:0 0 call_initcalls:40 level 1 clk_dt_probe()
D/TC:0 0 clk_dt_probe:202 Probing clocks from devicetree
I/TC: RCC is non-secure
D/TC:0 0 get_osc_freq_from_dt:1201 Osc clk-hsi: 64000000 Hz
D/TC:0 0 get_osc_freq_from_dt:1201 Osc clk-hse: 24000000 Hz
D/TC:0 0 get_osc_freq_from_dt:1201 Osc clk-csi: 4000000 Hz
D/TC:0 0 get_osc_freq_from_dt:1201 Osc clk-lsi: 32000 Hz
D/TC:0 0 get_osc_freq_from_dt:1201 Osc clk-lse: 32768 Hz
D/TC:0 0 get_osc_freq_from_dt:1207 Osc i2s_ckin: no frequency info
D/TC:0 0 get_osc_freq_from_dt:1207 Osc ck_usbo_48m: no frequency info
D/TC:0 0 clk_register:104 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:104 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:104 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:104 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:104 Registered clock (null), freq 533000000
D/TC:0 0 clk_register:104 Registered clock (null), freq 533000000
D/TC:0 0 clk_register:104 Registered clock (null), freq 133250000
D/TC:0 0 clk_register:104 Registered clock (null), freq 133250000
D/TC:0 0 clk_register:104 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:104 Registered clock (null), freq 133250000
D/TC:0 0 clk_register:104 Registered clock (null), freq 133250000
D/TC:0 0 clk_register:104 Registered clock spi6, freq 64000000
D/TC:0 0 clk_register:104 Registered clock i2c4, freq 64000000
D/TC:0 0 clk_register:104 Registered clock i2c6, freq 64000000
D/TC:0 0 clk_register:104 Registered clock usart1, freq 64000000
D/TC:0 0 clk_register:104 Registered clock rtcapb, freq 66625000
D/TC:0 0 clk_register:104 Registered clock (null), freq 66625000
D/TC:0 0 clk_register:104 Registered clock (null), freq 66625000
D/TC:0 0 clk_register:104 Registered clock (null), freq 66625000
D/TC:0 0 clk_register:104 Registered clock iwdg, freq 66625000
D/TC:0 0 clk_register:104 Registered clock (null), freq 66625000
D/TC:0 0 clk_register:104 Registered clock (null), freq 24000000
D/TC:0 0 clk_register:104 Registered clock gpioz, freq 266500000
D/TC:0 0 clk_register:104 Registered clock crpy1, freq 266500000
D/TC:0 0 clk_register:104 Registered clock hash1, freq 266500000
D/TC:0 0 clk_register:104 Registered clock rng1, freq 32000
D/TC:0 0 clk_register:104 Registered clock bkpsram, freq 266500000
D/TC:0 0 clk_register:104 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:104 Registered clock rtc, freq 32768
D/TC:0 0 clk_register:104 Registered clock gpioa, freq 0
D/TC:0 0 clk_register:104 Registered clock gpiob, freq 0
D/TC:0 0 clk_register:104 Registered clock gpioc, freq 0
D/TC:0 0 clk_register:104 Registered clock gpiod, freq 0
D/TC:0 0 clk_register:104 Registered clock gpioe, freq 0
D/TC:0 0 clk_register:104 Registered clock gpiof, freq 0
D/TC:0 0 clk_register:104 Registered clock gpiog, freq 0
D/TC:0 0 clk_register:104 Registered clock gpioh, freq 0
D/TC:0 0 clk_register:104 Registered clock gpioi, freq 0
D/TC:0 0 clk_register:104 Registered clock gpioj, freq 0
D/TC:0 0 clk_register:104 Registered clock gpiok, freq 0
D/TC:0 0 clk_register:104 Registered clock (null), freq 208877928
D/TC:0 0 clk_register:104 Registered clock (null), freq 64000000
D/TC:0 0 clk_register:104 Registered clock (null), freq 64000000
D/TC:0 0 clk_register:104 Registered clock (null), freq 64000000
D/TC:0 0 clk_register:104 Registered clock (null), freq 64000000
D/TC:0 0 clk_register:104 Registered clock (null), freq 64000000
D/TC:0 0 clk_register:104 Registered clock (null), freq 64000000
D/TC:0 0 clk_register:104 Registered clock (null), freq 208877928
D/TC:0 0 clk_register:104 Registered clock (null), freq 64000000
D/TC:0 0 clk_register:104 Registered clock syscfg, freq 0
D/TC:0 0 clk_register:104 Registered clock (null), freq 0
D/TC:0 0 clk_register:104 Registered clock (null), freq 0
D/TC:0 0 clk_register:104 Registered clock dbg, freq 0
D/TC:0 0 clk_register:104 Registered clock hse, freq 24000000
D/TC:0 0 clk_register:104 Registered clock csi, freq 4000000
D/TC:0 0 clk_register:104 Registered clock lsi, freq 32000
D/TC:0 0 clk_register:104 Registered clock lse, freq 32768
D/TC:0 0 clk_register:104 Registered clock hsi, freq 64000000
D/TC:0 0 clk_register:104 Registered clock (null), freq 12000000
D/TC:0 0 clk_register:104 Registered clock (null), freq 650000000
D/TC:0 0 clk_register:104 Registered clock (null), freq 650000000
D/TC:0 0 clk_register:104 Registered clock (null), freq 650000000
D/TC:0 0 clk_register:104 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:104 Registered clock pll2q, freq 533000000
D/TC:0 0 clk_register:104 Registered clock pll2r, freq 533000000
D/TC:0 0 clk_register:104 Registered clock (null), freq 208877929
D/TC:0 0 clk_register:104 Registered clock pll3q, freq 24573874
D/TC:0 0 clk_register:104 Registered clock pll3r, freq 11290698
D/TC:0 0 clk_register:104 Registered clock (null), freq 266500000
D/TC:0 0 clk_register:104 Registered clock (null), freq 650000000
D/TC:0 0 clk_register:104 Registered clock mcu, freq 208877929
D/TC:0 0 probe_driver_node:352 element: stm32mp1_clock on node rcc@50000000 initialized
D/TC:0 0 call_initcalls:40 level 1 teecore_init_pub_ram()
D/TC:0 0 call_initcalls:40 level 2 probe_dt_drivers_early()
D/TC:0 0 add_node_to_probe:547 element: soc on node simple-bus
D/TC:0 0 add_node_to_probe:547 element: ahb on node simple-bus
D/TC:0 0 probe_driver_node:352 element: simple-bus on node ahb initialized
D/TC:0 0 add_node_to_probe:547 element: rcc@50000000 on node stm32_rstctrl
D/TC:0 0 add_node_to_probe:547 element: watchdog@5a002000 on node stm32-iwdg
D/TC:0 0 probe_driver_node:352 element: simple-bus on node soc initialized
D/TC:0 0 register_periph_iomem:361 IO for non-secure resource 0x5a002000
D/TC:0 0 probe_driver_node:352 element: stm32-iwdg on node watchdog@5a002000 initialized
D/TC:0 0 probe_driver_node:352 element: stm32_rstctrl on node rcc@50000000 initialized
D/TC:0 0 call_initcalls:40 level 3 platform_banner()
I/TC: Platform stm32mp1: flavor PLATFORM_FLAVOR - DT stm32mp157c-dk2.dts
D/TC:0 0 call_initcalls:40 level 3 set_gpioz_nbpin_from_dt()
D/TC:0 0 call_initcalls:40 level 3 init_etzpc_from_dt()
D/TC:0 0 init_device_from_hw_config:308 ETZPC revison 0x0232, per_sec 96, ahb_sec 0, tzma 2
D/TC:0 0 call_initcalls:40 level 3 check_ta_store()
D/TC:0 0 check_ta_store:408 TA store: "Secure Storage TA"
D/TC:0 0 check_ta_store:408 TA store: "REE"
D/TC:0 0 call_initcalls:40 level 3 verify_pseudo_tas_conformance()
D/TC:0 0 call_initcalls:40 level 3 tee_cryp_init()
D/TC:0 0 tee_pager_add_core_region:634 0x3003c000 - 0x30048000 : type 2
D/TC:0 0 plat_rng_init:53 PRNG seeded with RNG1
D/TC:0 0 call_initcalls:40 level 4 init_stm32mp1_drivers()
D/TC:0 0 call_initcalls:40 level 4 init_console_from_dt()
D/TC:0 0 register_periph_iomem:361 IO for non-secure resource 0x40010000
I/TC: DTB enables console (non-secure)
D/TC:0 0 call_initcalls:40 level 4 tee_fs_init_key_manager()
D/TC:0 0 call_initcalls:40 level 5 init_stm32mp1_tzc()
D/TC:0 0 tzc_dump_state:473 region 0
D/TC:0 0 tzc_dump_state:476 region_base: 0x0000000000000000
D/TC:0 0 tzc_dump_state:479 region_top: 0x00000000ffffffff
D/TC:0 0 tzc_dump_state:482 secure rw: TZC_REGION_S_NONE
D/TC:0 0 tzc_dump_state:486 filter 0 enable
D/TC:0 0 tzc_dump_state:486 filter 1 enable
D/TC:0 0 tzc_dump_state:473 region 1
D/TC:0 0 tzc_dump_state:476 region_base: 0x00000000c0000000
D/TC:0 0 tzc_dump_state:479 region_top: 0x00000000ddffffff
D/TC:0 0 tzc_dump_state:482 secure rw: TZC_REGION_S_NONE
D/TC:0 0 tzc_dump_state:486 filter 0 enable
D/TC:0 0 tzc_dump_state:486 filter 1 enable
D/TC:0 0 tzc_dump_state:473 region 2
D/TC:0 0 tzc_dump_state:476 region_base: 0x00000000de000000
D/TC:0 0 tzc_dump_state:479 region_top: 0x00000000dfdfffff
D/TC:0 0 tzc_dump_state:482 secure rw: TZC_REGION_S_RDWR
D/TC:0 0 tzc_dump_state:486 filter 0 enable
D/TC:0 0 tzc_dump_state:486 filter 1 enable
D/TC:0 0 tzc_dump_state:473 region 3
D/TC:0 0 tzc_dump_state:476 region_base: 0x00000000dfe00000
D/TC:0 0 tzc_dump_state:479 region_top: 0x00000000dfffffff
D/TC:0 0 tzc_dump_state:482 secure rw: TZC_REGION_S_NONE
D/TC:0 0 tzc_dump_state:486 filter 0 enable
D/TC:0 0 tzc_dump_state:486 filter 1 enable
D/TC:0 0 gic_it_set_cpu_mask:307 cpu_mask: writing 0xff to 0x2ba21824
D/TC:0 0 gic_it_set_cpu_mask:309 cpu_mask: 0x3
D/TC:0 0 gic_it_set_prio:322 prio: writing 0x1 to 0x2ba21424
D/TC:0 0 call_initcalls:40 level 5 initialize_pmic()
D/TC:0 0 i2c_compute_timing:449 I2C SDADEL(min/max): 18/3069, SCLDEL(Min): 435
D/TC:0 0 i2c_compute_timing:547 I2C TIMINGR (PRESC/SCLDEL/SDADEL): 1/13/1
D/TC:0 0 i2c_compute_timing:549 I2C TIMINGR (SCLH/SCLL): 155/144
D/TC:0 0 i2c_compute_timing:550 I2C TIMINGR: 0x10d19b90
D/TC:0 0 i2c_setup_timing:638 I2C Freq(100000Hz), Clk Source(64000000)
D/TC:0 0 i2c_setup_timing:640 I2C Rise(185) and Fall(20) Time
D/TC:0 0 i2c_setup_timing:642 I2C Analog Filter(On), DNF(0)
D/TC:0 0 initialize_pmic:629 PMIC version = 0x10
D/TC:0 0 stpmic1_dump_regulators:1009 PMIC regul buck1: enable, 1200mV
D/TC:0 0 stpmic1_dump_regulators:1009 PMIC regul buck2: enable, 1350mV
D/TC:0 0 stpmic1_dump_regulators:1009 PMIC regul buck3: enable, 3300mV
D/TC:0 0 stpmic1_dump_regulators:1009 PMIC regul buck4: enable, 3300mV
D/TC:0 0 stpmic1_dump_regulators:1009 PMIC regul ldo1: disable, 1800mV
D/TC:0 0 stpmic1_dump_regulators:1009 PMIC regul ldo2: disable, 1800mV
D/TC:0 0 stpmic1_dump_regulators:1009 PMIC regul ldo3: enable, 500mV
D/TC:0 0 stpmic1_dump_regulators:1009 PMIC regul ldo4: enable, 0mV
D/TC:0 0 stpmic1_dump_regulators:1009 PMIC regul ldo5: enable, 2900mV
D/TC:0 0 stpmic1_dump_regulators:1009 PMIC regul ldo6: disable, 1000mV
D/TC:0 0 stpmic1_dump_regulators:1009 PMIC regul vref_ddr: enable, 0mV
D/TC:0 0 stpmic1_dump_regulators:1009 PMIC regul boost: disable, 0mV
D/TC:0 0 stpmic1_dump_regulators:1009 PMIC regul pwr_sw1: disable, 0mV
D/TC:0 0 stpmic1_dump_regulators:1009 PMIC regul pwr_sw2: disable, 0mV
D/TC:0 0 register_periph:219 Register GPIOZ4 as non-secure
D/TC:0 0 register_periph:219 Register GPIOZ5 as non-secure
D/TC:0 0 register_periph:219 Register I2C4 as non-secure
D/TC:0 0 parse_regulator_fdt_nodes:455 No CPU supply provided
D/TC:0 0 call_initcalls:40 level 5 stm32mp1_iocomp()
D/TC:0 0 stm32mp_syscfg_enable_io_compensation:66 SYSCFG.cmpcr = 0xc6870100
D/TC:0 0 call_initcalls:40 level 5 stm32_rng_init()
D/TC:0 0 register_periph:219 Register RNG1 as non-secure
D/TC:0 0 stm32_rng_init:244 RNG init
D/TC:0 0 call_initcalls:40 level 5 probe_dt_drivers()
D/TC:0 0 call_initcalls:40 level 6 init_late_stm32mp1_drivers()
D/TC:0 0 call_initcalls:40 level 6 stm32mp1_init_scmi_server()
D/TC:0 0 call_initcalls:40 level 6 stm32mp1_init_final_shres()
D/TC:0 0 stm32mp1_init_final_shres:710 stm32mp GPIOZ0   ( 0): unregistered  
D/TC:0 0 stm32mp1_init_final_shres:710 stm32mp GPIOZ1   ( 1): unregistered  
D/TC:0 0 stm32mp1_init_final_shres:710 stm32mp GPIOZ2   ( 2): unregistered  
D/TC:0 0 stm32mp1_init_final_shres:710 stm32mp GPIOZ3   ( 3): unregistered  
D/TC:0 0 stm32mp1_init_final_shres:710 stm32mp GPIOZ4   ( 4): non-secure    
D/TC:0 0 stm32mp1_init_final_shres:710 stm32mp GPIOZ5   ( 5): non-secure    
D/TC:0 0 stm32mp1_init_final_shres:710 stm32mp GPIOZ6   ( 6): unregistered  
D/TC:0 0 stm32mp1_init_final_shres:710 stm32mp GPIOZ7   ( 7): unregistered  
D/TC:0 0 stm32mp1_init_final_shres:710 stm32mp IWDG1    ( 8): unregistered  
D/TC:0 0 stm32mp1_init_final_shres:710 stm32mp USART1   ( 9): unregistered  
D/TC:0 0 stm32mp1_init_final_shres:710 stm32mp SPI6     (10): non-secure    
D/TC:0 0 stm32mp1_init_final_shres:710 stm32mp I2C4     (11): non-secure    
D/TC:0 0 stm32mp1_init_final_shres:710 stm32mp RNG1     (12): non-secure    
D/TC:0 0 stm32mp1_init_final_shres:710 stm32mp HASH1    (13): non-secure    
D/TC:0 0 stm32mp1_init_final_shres:710 stm32mp CRYP1    (14): unregistered  
D/TC:0 0 stm32mp1_init_final_shres:710 stm32mp I2C6     (15): unregistered  
D/TC:0 0 stm32mp1_init_final_shres:710 stm32mp RTC      (16): non-secure    
D/TC:0 0 stm32mp1_init_final_shres:710 stm32mp MCU      (17): unregistered  
D/TC:0 0 stm32mp1_init_final_shres:710 stm32mp PLL3     (18): unregistered  
D/TC:0 0 stm32mp1_init_final_shres:710 stm32mp MDMA     (19): unregistered  
D/TC:0 0 stm32_bsec_shadow_register:239 BSEC shadow warning: OTP locked
D/TC:0 0 call_initcalls:40 level 6 mobj_init()
D/TC:0 0 call_initcalls:40 level 6 rwp_init()
D/TC:0 0 tee_pager_add_core_region:634 0x30048000 - 0x30084000 : type 1
D/TC:0 0 call_initcalls:40 level 6 default_mobj_init()
D/TC:0 0 call_initcalls:40 level 7 release_probe_lists()
D/TC:0 0 call_finalcalls:59 level 1 release_external_dt()
I/TC: Primary CPU switching to normal world boot

etienne-lms commented 2 years ago

Hello @coveritytest.

You say you don't have this trace:

I/TC: RCC is non-secure

then your OP-TEE assigns RCC SoC subsystem to secure world. Check your U-Boot: when RCC security is enabled, U-Boot needs a specific configuration as it cannot access RCC, only secure world can (u-boot/linux "rcc" node probes driver with compatible="st,stm32mp1-rcc-secure"). In this configuration, U-Boot must use SCMI resouces to access some clocks and reset controller.

I note in your traces and the pager pool this is very very small:

I/TC: Pager pool size: 56kB

For info, 56kB of physical pages is not much for pager execution to be smooth. OP-TEE will likely be quite slow to invoke TAs and perform some services, xtest will liekly be very slow to complete.

coveritytest commented 2 years ago

Thanks for the hint. So according to

https://wiki.st.com/stm32mpu/wiki/STM32MP15_RCC_internal_peripheral

RCC is supposed to be secure, so my setup seems to be correct in TF-A and OP-TEE. Question is, how to tell U-Boot that. This is apparently undocumented in the ST wiki, at least I did not find a page which is really bad. Is RCC supposed to be disabled completely in the DT then?

etienne-lms commented 2 years ago

U-Boot and Linux DTS files should be updated to replace rcc phandle with scmi based phandles.

In latest Linux kernel and U-Boot, you'll find file like stm32mp157c-dk2-scmi.dts files, with that -scmi.dts name termination. These DTS files include a DTSI file (stm32mp15-scmi.dtsi) used as a overlay to replace RCC phandles from SoC DTSI files (Linux and U-Boot can no more access) with the SCMI ones + defining/enable the few SCMI resources needed. I suggest you pick stm32mp15-scmi.dtsi file and include it from your platform DTS file.

[1] https://elixir.bootlin.com/u-boot/v2022.10/source/arch/arm/dts/stm32mp15-scmi.dtsi [2] https://elixir.bootlin.com/linux/v5.19/source/arch/arm/boot/dts/stm32mp15-scmi.dtsi

coveritytest commented 2 years ago

Thanks for the hint. I did not see the upstream changes. I now used the device tree based on https://elixir.bootlin.com/u-boot/v2022.10/source/arch/arm/dts/stm32mp157c-dk2-scmi.dts as you recommended.

However the log

I/TC: RCC is non-secure

still does not come up. What changed is the message

I/TC: Forced system reset

right before OP-TEE tries to switch to U-Boot. It then resets the system and the TF-A is executed in an infinite loop.

Is the OP-TEE device tree supposed to be the same as the TF-A device tree?
How to change this: I/TC: Pager pool size: 56kB, I'm using the default values...

coveritytest commented 2 years ago

With v2021.10 and stm32_defconfig it works. One would expect to use the stm32_trusted_defconfig in an OP-TEE setup, weird naming.

etienne-lms commented 2 years ago

I/TC: RCC is non-secure

still does not come up. What changed is the message

I don't understand what you expect here. Trace message "I/TC: RCC is non-secure" does not appear so I though you intentionnally enable stm32mp15 RCC secure access restrictions (RCC[TZEN]). But from your comments it seems you don't expect that.

With v2021.10 and stm32_defconfig it works. One would expect to use the stm32_trusted_defconfig in an OP-TEE setup, weird naming.

True, see OP-TEE build commit 3e2f82c.

coveritytest commented 2 years ago

I/TC: RCC is non-secure still does not come up. What changed is the message

I don't understand what you expect here. Trace message "I/TC: RCC is non-secure" does not appear so I though you intentionnally enable stm32mp15 RCC secure access restrictions (RCC[TZEN]). But from your comments it seems you don't expect that.

Yeah, you're right, I was confusing things. I did not enable TZEN knowingly, I just used the default TF-A 2.6 from ST with my device trees and TRUSTED_BOOT enabled. So apparently then TZEN and MCKPROT are both enabled by default as OP-TEE log says:

D/TC:0 0 check_rcc_secure_configuration:506 RCC/PWR secure hardening: TZEN enable, MCKPROT enable

Now the next step is to get Linux running. Currently v5.10 won't boot. Will I need v5.15?

    Sign value:   unavailable
     Timestamp:    unavailable
   Verifying Hash Integrity ... sha256+ OK
Bootstage space exhasuted
Bootstage space exhasuted
Bootstage space exhasuted
Bootstage space exhasuted
   Loading fdt from 0xc26ae0ac to 0xc4000000
Bootstage space exhasuted
   Booting using the fdt blob at 0xc4000000
   Loading Kernel Image
Bootstage space exhasuted
Bootstage space exhasuted
   Loading Ramdisk to cfd24000, end cffff52f ... OK
   Using Device Tree in place at c4000000, end c4015c9c
ETZPC: 0x54003000 node disabled, decprot 7=0
Bootstage space exhasuted
Bootstage space exhasuted

Starting kernel ...

D/TC:0   psci_cpu_on:175 core 1, ns_entry 0xc0101560, state 0
I/TC:I/TC: Secondary CPU 1 switching to normal world boot
D/TC:0   pwr_scv_handler:54 PWR service: write 0x0 at offset 0x28
D/TC:0   pwr_scv_handler:54 PWR service: set 0x3f at offset 0x20
D/TC:1   pm_domain_scv_handler:29 Enable PD 2
D/TC:1   pm_domain_scv_handler:29 Enable PD 1
D/TC:1   pm_domain_scv_handler:29 Disable PD 1
D/TC:1   pm_domain_scv_handler:29 Disable PD 2
D/TC:1   pm_domain_scv_handler:29 Enable PD 2
D/TC:1   pm_domain_scv_handler:29 Enable PD 1
D/TC:0   tee_entry_exchange_capabilities:100 Asynchronous notifications are disabled
D/TC:0   tee_entry_exchange_capabilities:112 Dynamic shared memory is enabled
D/TC:? 0 tee_ta_init_pseudo_ta_session:296 Lookup pseudo TA 7011a688-ddde-4053-a5a9-7b3c4ddf13b8
D/TC:? 0 tee_ta_init_pseudo_ta_session:309 Open device.pta
D/TC:? 0 tee_ta_init_pseudo_ta_session:326 device.pta : 7011a688-ddde-4053-a5a9-7b3c4ddf13b8
D/TC:? 0 tee_ta_init_pseudo_ta_session:296 Lookup pseudo TA ab7a617c-b8e7-4d8f-8301-d09b61036b64
D/TC:? 0 tee_ta_init_pseudo_ta_session:309 Open rng.pta
D/TC:? 0 tee_ta_init_pseudo_ta_session:326 rng.pta : ab7a617c-b8e7-4d8f-8301-d09b61036b64
D/TC:? 0 tee_ta_close_session:514 csess 0x2ffe7c68 id 3
D/TC:? 0 tee_ta_close_session:533 Destroy session
D/TC:1   pm_domain_scv_handler:29 Disable PD 1
D/TC:1   pm_domain_scv_handler:29 Disable PD 2
D/TC:1   pm_domain_scv_handler:29 Enable PD 2
D/TC:1   pm_domain_scv_handler:29 Enable PD 1
D/TC:1   pm_domain_scv_handler:29 Disable PD 1
D/TC:1   pm_domain_scv_handler:29 Disable PD 2
D/TC:1   pm_domain_scv_handler:29 Enable PD 2
D/TC:1   pm_domain_scv_handler:29 Enable PD 1
D/TC:1   pm_domain_scv_handler:29 Disable PD 1
D/TC:1   pm_domain_scv_handler:29 Disable PD 2
D/TC:1   pm_domain_scv_handler:29 Enable PD 2
D/TC:1   pm_domain_scv_handler:29 Enable PD 1

coveritytest commented 2 years ago

Finally it works with v5.15.24.

coveritytest commented 2 years ago

As v5.15 has only support until October 2023, does this OP-TEE setup work with v5.10 too, or is it missing some stuff?

etienne-lms commented 2 years ago

Sorry, I don't understand the question. Which component source tree are you starting from for TF-A, OP-TEE, U-Boot and Linux. Mainline repositories or repositories from github.com/STMicroelectronics ?

symdeb commented 1 year ago

I had the same reboot issue. I had this when using stm32mp1_trusted_defconfig.
after I changed to stm32mp1_defconfig this reboot loop issue went away.

The two next defconfig are kept only for compatibility with upstream, don't use them:

configs/stm32mp15_trusted_defconfig with stm32 image header support (CONFIG_STM32MP15x_STM32IMAGE)
configs/stm32mp15_basic_defconfig when SPL is used

Check the warning here: https://wiki.st.com/stm32mpu/wiki/STM32MP15_U-Boot

Just redone the whole boot chain and found that another reason for the I/TC: Forced system reset reboot was the missing UART4 definition in the stm32mp157a-.dts DT and stmp32mp157a--u-boot.dtsi files . See also the WIKI for "How to configure u-boot"

etienne-lms commented 1 year ago

For what I know, in recent U-Boot, stm32mp15 has 2 3 defconfigs ~~from~~ for ST boards. stm32mp15_defconfig targets images booted with a TF-A/FIP image. stm32mp15_basic_defconfig targets images booted from SPL. stm32mp15_trusted_defconfig targets a boot sequence using deprecated .stm32 format.

maxswjeon commented 10 months ago

So, it may be not that relevant, but for someone stepping on hanging at I/TC: Primary CPU switching to normal world boot

STM32MP1 series u-boot offers early u-boot serial with those options at u-boot defconfig.

CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_STM32=y
CONFIG_DEBUG_UART_BASE=0x40010000

Refer to ST Microelectonic's documentations https://wiki.st.com/stm32mpu/index.php?title=U-Boot_-_How_to_debug&oldid=76641

The UART base address can be found at tf-a or optee dts files.

For me, I was lacking a UART driver for STM32MP135D, finding STM32CubeMX does not generate proper -u-boot.dtsi files.

BernardPuel commented 9 months ago

Cubemx does not generate Uart configs for consoles (early nor standard). You have to do it manually thanks to USER sections like it is done for example for ST DK board:

Generated code in this file -mx-u-boot.dtsi : / USER CODE BEGIN addons / &uart4{ u-boot,dm-pre-reloc; };

&uart4_pins_mx { u-boot,dm-pre-reloc; pins1 { u-boot,dm-pre-reloc; }; pins2 { u-boot,dm-pre-reloc; }; }; / USER CODE END addons /

see also wiki (you probably already know) = https://wiki.st.com/stm32mpu/wiki/How_to_configure_U-Boot_for_your_board#Console

SimoneBongini commented 9 months ago

In my case U-Boot hangs at I/TC: Primary CPU switching to normal world boot because CONFIG_ARM_SMCCC was not sets in U-Boot configuration.

OP-TEE / optee_os

Boot process halts after I/TC: Primary CPU switching to normal world boot #5571