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Introduce RCC driver STM32MP25 platform #6875

Closed Gabriel-Fernandz closed 2 days ago

Gabriel-Fernandz commented 3 weeks ago

This patch-set introduces a clock and reset driver for STM32MP25, based on the Arm Cortex-A35. This RCC driver requires the sysconf driver to configure the PLL1 from Cortex-A35.

etienne-lms commented 2 days ago

Checkpatch reports that make CI / Code style to fail are all false positive:

CHECK: No space is necessary after a cast
#328: FILE: core/drivers/rstctrl/stm32_rstctrl.h:26:
+   SLIST_ENTRY(stm32_rstline) link;

The line does not relate to a case but to a field definition in a struct definition.

WARNING: 'HSI' may be misspelled - perhaps 'HIS'?
#1883: FILE: core/drivers/clk/clk-stm32mp25.c:1836:
+   /* Come back to HSI for flexgen */
                    ^^^

No misspell issue here, the clock is named HSI in the chip reference manual.