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core: riscv: core_mmu_arch: fix PPN field extraction from PTE #6962

Closed lyctw closed 3 months ago

lyctw commented 3 months ago

The upper bits of page table entry may contain other fields such as PBMT and N bits, thus PPN field should be masked out with PTE_PPN.

gagachang commented 3 months ago

Hi @maroueneboubakri, would you like to review this small patch ?

maroueneboubakri commented 3 months ago

@gagachang could you please add to your commit message, since which specification version the change on the PTE

Thanks Maro

gagachang commented 3 months ago

@gagachang could you please add to your commit message, since which specification version the change on the PTE

Sure. Actually, the additional fields of PTE are defined in Svnapot (for N bit) and Svpbmt (for PBMT bits). They were added into Priv. ISA spec. from version 20211203.

image

@lyctw, would you like to add some words about the specification version ?

lyctw commented 3 months ago

Hi All,

Update according to the changelog: image

Thanks for the review!

maroueneboubakri commented 3 months ago

Reviewed-By: Marouene Boubakri <marouene.boubakri@nxp.com>

gagachang commented 3 months ago

Hi @jforissier , we are ready to merge this PR 😃

jforissier commented 3 months ago

Hi @jforissier , we are ready to merge this PR 😃

You're right, sorry for not noticing.