KPI clock divider setting

[EgorLopatkin]

Hi. I need help setting up the keyboard frequency divider. I have already using two dividers in the ma35d1.dtsi file:

    keypad: keypad@404A0000 {
        compatible = "nuvoton,ma35d1-kpi";

        reg = <0x0 0x404A0000 0x0 0x10000>;
        interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;

        clocks = <&clk KPI_GATE>;

        assigned-clocks = <&clk KPI_MUX>;
        assigned-clock-parents = <&clk HXT>;  /* 24 MHz, LXT is not soldered on board */
        ...
        per-scale = <256>;
        per-scalediv = <256>;
        ...
    }

And trying to set this clock divider: https://github.com/OpenNuvoton/MA35D1_linux-5.10.y/blob/9273b8f48c75cc19933858526390bbd6ab662919/drivers/clk/nuvoton/clk-ma35d1.c#L668 How to do it correctly? I tried using the devmem utility: # devmem 0x4046023C 32 0x80000000 But according to the response of the keyboard, it feels like it doesn't work.

[mjchen1]

These two dividers correspond to the following two KPI registers, rather than the clock register. Below is an explanation of the settings for these two dividers

[EgorLopatkin]

Is there any other method of dividing the HXT clock frequency in addition to the registers described? My crystal clock frequency is 24 MHz, so the row scan time is (1 / 24,000,000) 256 256, which is 2.7 milliseconds. I would like to increase this time in order to increase the de-bouncing sampling cycle.

[mjchen1]

If your board has LXT on it. You can try changing HXT to LXT. The frequency of LXT is 32.768 kHz. The modification method is as follows:

assigned-clocks = <&clk KPI_MUX>; assigned-clock-parents = <&clk LXT>;

[EgorLopatkin]

Thanks