Unconditional MDC handling

[lightelf76]

EMAC driver attempts to manipulate PHY registers unconditionally. It become a problem, if switch (like ksz8863rll) used instead of regular PHY. It's desirable to introduce CONFIG_ parameter to do avoid PHY registers touching. Do you want a patch for this modification?

[yachen]

Hi,

Does this patch affect existing users if CONFIG_ is not set?

Sincerely,

Yi-An Chen

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[lightelf76]

No, it's not. CONFIG_NUC970_EMAC0_NO_MDC, if set skips some parts of EMAC0 driver and pin initialization (our board reuse MDC pins as GPIO for other purposes). Switch can be programmed via I2C, but it's not needed for U-Boot.

[yachen]

Hi,

Yes please submit the patch that skip MDC/MDIO control if CONFIG_NUC970_EMAC0_NO_MDC set. We have other customers connect switch chip with EMAC. But I think they only use EMAC after enter Linux kernel. Thanks.

Sincerely,

Yi-An Chen

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[lightelf76]

Done, please see pull request. By the way, how to correctly set up such configuration within Linux?

[yachen]

Hi,

In Linux:

1. If you're using device tree, modify the device tree file to skip MDC and MDIO setting. Otherwise you'll have to modify drivers/pinctrl-nuc970.c to remove these pins from emac0_pins[] array.
2. Use ethtool to fix EMAC at 100F.
3. Provide switch driver if kernel doesn't have driver for the switch you're using,

Sincerely,

Yi-An Chen

[lightelf76]

Actually, it's not worked this way. EMAC0 interface just does not come up. nuc970_ether_probe() calls nuc970_mii_setup(), which itself tries to find any PHY (without success of course) and fails. Than nuc970_ether_probe() fails also.

[yachen]

Ah, that’s right. Forgot the MII setup parts. Other customers connecting with switch still use MDC/MDIO connecting with switch chip. Does it work after remove the mii setup code?

Sincerely,

Yi-An Chen

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[lightelf76]

Not tested yet. I am not so familiar with Linux, yet. Hope to test today.

[lightelf76]

Solution (for Linux) was to use Fixed PHY driver. I still need to implement proper support for switch, but it's OK as temporary solution. BTW, what is a current status of DeviceTree support? Is it mature or still "work in progress"?

[yachen]

Hi,

Yes, NUC970 kernel already supports device tree.

Sincerely,

Yi-An Chen

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[lightelf76]

Thanks, will try later. I have one more question (it's probably not a right place, but I don't know better). Custom board with NUC976 rev.B, SPI flash GD25Q127CSIGR. Burning and verification in NuWriter are succeed. but board fail to boot with message "No image in SPI, USB boot". Same board with W25Q128 boots OK. What can be a reason? Is it limitation of rev.B chip?

[yachen]

Hi,

That message means IBR cannot find boot image. We also use GD25Q128B which works find on our DEV board. Can you check following items for me?

1. Make sure boot image attribute is set as uBoot, no matter if it’s u-Boot or not.

2. I compared the datasheet of GD25Q127C and GD25Q128B. The reset and read commands are the same, so IBR should be able to read the flash. But HOLD pin on GD25Q127C also has a extra function as RESET. Can you check this pin’s status during booting?

And by the way, NUC970 series doesn’t have ver. B 128 pin package. So what you’re using is a ver. C NUC976.

Sincerely,

Yi-An Chen

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[lightelf76]

1. Of cause the NuWriter settings was exactly same for Winbond and Gigadevice flash
2. HOLD pin tied to 3.3V with 10 kOhm resistor.
3. :))
   

[yachen]

Hi,

I'll see if we can find some GD25Q127C sample to check this issue. Thanks.

Sincerely,

Yi-An Chen

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[yachen]

Hi,

I probably know what goes wrong. This flash requires 30uS stable time after reset command. Ver. B IBR doesn’t have a wait after reset command. Can you test again with power on setting @ PA.2 pin configure to low? This option enables IBR to use 12MHz crystal for booting so give some extra delay after reset command. Or test with a ver. C chip. Ver. C IBR adds some delay after reset command.

Sincerely,

Yi-An Chen

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[lightelf76]

Yes, it really was a limitation of Rev.B chip. Same board, same flash, MCU changed to rev.C - work as a charm. Thanks.