opsg.v: Removed prescaler and exposed the sound clock 'clk_sound'

[hvegh]

Benefits:

• An external prescaler can be better finetuned to provide the requested sound clock, maybe even with less resources.
• To seperate clock domains: The device can be directly embedded in your core 'clk' domain that you may use to for your processor for example. Do not worry abount clock domain crossings. The 'clk' domain only writes to the configuration registers, and the 'clk_sound' domain only reads them. So they could even be phase unaligned.

Signed-off-by: Henk Vergonet henk.vergonet@gmail.com

[hvegh]

I like this implementation very good and maintainable. Thank you Rene!

[hvegh]

BTW Tested this on a Gowin FPGA, pushed the sound out via HDMI. Souded like 440 Hz with 254 in the frequency register.