cpu-o3,arch-riscv: make gem5 behaviour like NEMU when trap - Githubissues

OpenXiangShan / GEM5

BSD 3-Clause "New" or "Revised" License

54 stars 21 forks source link

cpu-o3,arch-riscv: make gem5 behaviour like NEMU when trap #13

Closed shinezyy closed 2 years ago

shinezyy commented 2 years ago

send trapNO in the meantime

Change-Id: I1c3886f64f77a1509543ecd4ffbabc35ad51ca67