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OpenXiangShan / XiangShan

Open-source high-performance RISC-V processor
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clockgate: set default initialization with 0 to fix X in vcs #3031

Closed Maxpicca-Li closed 4 weeks ago

XiangShanRobot commented 4 weeks ago
[Generated by IPC robot] commit: db69d6216bf2c2e10adc8f528be334d1042d7f98 commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
db69d62 1.821 0.448 2.054 1.173 2.950 2.500 2.291 0.923 1.376 1.265 3.448 2.667 2.398 2.940
master branch: commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
dc30dd9
cd467f7 1.821 0.448 2.054 1.173 2.950 2.500 2.291 0.923 1.376 1.265 3.448 2.667 2.398 2.940
75b44a5 1.821 0.448 2.054 1.173 2.950 2.500 2.291 0.923 1.376 1.265 3.448 2.667 2.398 2.940
321866f 1.821 0.448 2.054 1.173 2.950 2.500 2.291 0.924 1.376 1.265 3.448 2.667 2.398 2.940
082b30d 1.821 0.448 2.054 1.173 2.950 2.500 2.291 0.923 1.376 1.265 3.448 2.667 2.398 2.940
0e28018 1.823 0.448 2.054 1.172 2.950 2.500 2.292 0.923 1.376 1.265 3.449 2.656 2.398 2.943
df7130a 1.823 0.448 2.054 1.172 2.950 2.500 2.292 0.923 1.376 1.265 3.449 2.656 2.398 2.943
b51ac1c 1.823 0.448 2.054 1.172 2.950 2.500 2.292 0.923 1.376 1.265 3.449 2.656 2.398 2.943
79fadd7 1.868 0.448 2.096 1.166 2.945 2.603 2.333 0.952 1.377 1.298 3.424 2.659 2.468 2.945
f48d8a2 1.868 0.448 2.096 1.166 2.945 2.603 2.333 0.952 1.377 1.298 3.424 2.659 2.468 2.945