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OpenXiangShan / XiangShan

Open-source high-performance RISC-V processor
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FPU: fix f2v boxing error when higher bits are not all zeros #3035

Closed lewislzh closed 3 weeks ago

lewislzh commented 3 weeks ago

FPU: fix f2v boxing error set result as NAN when higher bit are not all zeros

XiangShanRobot commented 3 weeks ago
[Generated by IPC robot] commit: c47fb5f0621a9d03aa6219b53c1a3e749ae9078c commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
c47fb5f 1.815 0.448 2.060 1.182 2.953 2.504 2.291 0.930 1.403 1.319 3.426 2.660 2.397 2.940
master branch: commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
31fae68 1.815 0.448 2.060 1.182 2.953 2.504 2.291 0.930 1.403 1.319 3.426 2.660 2.397 2.940
071c63e 1.815 0.448 2.060 1.182 2.953 2.504 2.291 0.930 1.403 1.319 3.426 2.660 2.397 2.940
6b742a1 1.821 0.448 2.054 1.173 2.950 2.500 2.291 0.923 1.376 1.265 3.448 2.667 2.398 2.940
dc30dd9 1.821 0.448 2.054 1.173 2.950 2.500 2.291 0.923 1.376 1.265 3.448 2.667 2.398 2.940
cd467f7 1.821 0.448 2.054 1.173 2.950 2.500 2.291 0.923 1.376 1.265 3.448 2.667 2.398 2.940
75b44a5 1.821 0.448 2.054 1.173 2.950 2.500 2.291 0.923 1.376 1.265 3.448 2.667 2.398 2.940
321866f 1.821 0.448 2.054 1.173 2.950 2.500 2.291 0.924 1.376 1.265 3.448 2.667 2.398 2.940
082b30d 1.821 0.448 2.054 1.173 2.950 2.500 2.291 0.923 1.376 1.265 3.448 2.667 2.398 2.940
0e28018 1.823 0.448 2.054 1.172 2.950 2.500 2.292 0.923 1.376 1.265 3.449 2.656 2.398 2.943
df7130a 1.823 0.448 2.054 1.172 2.950 2.500 2.292 0.923 1.376 1.265 3.449 2.656 2.398 2.943