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OpenXiangShan / XiangShan

Open-source high-performance RISC-V processor
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PTW, LLPTW: change the flush signal to be same to the flush in L2TLB #3045

Closed pxk27 closed 3 weeks ago

pxk27 commented 3 weeks ago

L2TLB flush was controlled by vsatp or hgatp or satp or sfence, but the flush of LLPTW and PTW was controlled by satp and sfence. That makes some bugs

XiangShanRobot commented 3 weeks ago
[Generated by IPC robot] commit: 7608f9a61bf1d554f02fbe4d7c7eff0c01b0127b commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
7608f9a 1.815 0.448 2.060 1.182 2.953 2.504 2.291 0.930 1.403 1.319 3.426 2.660 2.397 2.940
master branch: commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
202ef6b 1.815 0.448 2.060 1.182 2.953 2.504 2.291 0.930 1.403 1.319 3.426 2.660 2.397 2.940
4c46d75 1.815 0.448 2.060 1.182 2.953 2.504 2.291 0.930 1.403 1.319 3.426 2.660 2.397 2.940
807e518 1.815 0.448 2.060 1.182 2.953 2.504 2.291 0.930 1.403 1.319 3.426 2.660 2.397 2.940
5820cff 1.815 0.448 2.060 1.182 2.953 2.504 2.291 0.930 1.403 1.319 3.426 2.660 2.397 2.940
8daac0b
c41a9f7
31fae68 1.815 0.448 2.060 1.182 2.953 2.504 2.291 0.930 1.403 1.319 3.426 2.660 2.397 2.940
071c63e 1.815 0.448 2.060 1.182 2.953 2.504 2.291 0.930 1.403 1.319 3.426 2.660 2.397 2.940
6b742a1 1.821 0.448 2.054 1.173 2.950 2.500 2.291 0.923 1.376 1.265 3.448 2.667 2.398 2.940
dc30dd9 1.821 0.448 2.054 1.173 2.950 2.500 2.291 0.923 1.376 1.265 3.448 2.667 2.398 2.940
Lemover commented 3 weeks ago

May I should be out of the MMU owners.