OpenXiangShan / XiangShan

Open-source high-performance RISC-V processor
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LSQ: use RegNextWithEnable when RegEnable.next contains RegEnable.enable #3046

Closed huxuan0307 closed 3 weeks ago

XiangShanRobot commented 3 weeks ago
[Generated by IPC robot] commit: 9e663729d271795de4b9207d872f3172922d296b commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
9e66372 1.812 0.448 2.060 1.183 2.953 2.504 2.291 0.927 1.403 1.319 3.431 2.658 2.397 2.942
master branch: commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
0f42355 1.820 2.060 1.199 2.938 2.508 2.290 0.932 1.419 1.338 3.427 2.398 2.932
95e6033 1.820 2.060 1.199 2.938 2.508 2.290 0.932 1.419 1.338 3.427 2.398 2.932
58cb1b0 1.822 0.448 2.060 1.180 2.944 2.503 2.291 0.932 1.419 1.328 3.437 2.644 2.399 2.931
202ef6b 1.815 0.448 2.060 1.182 2.953 2.504 2.291 0.930 1.403 1.319 3.426 2.660 2.397 2.940
4c46d75 1.815 0.448 2.060 1.182 2.953 2.504 2.291 0.930 1.403 1.319 3.426 2.660 2.397 2.940
807e518 1.815 0.448 2.060 1.182 2.953 2.504 2.291 0.930 1.403 1.319 3.426 2.660 2.397 2.940
5820cff 1.815 0.448 2.060 1.182 2.953 2.504 2.291 0.930 1.403 1.319 3.426 2.660 2.397 2.940
8daac0b
c41a9f7
31fae68 1.815 0.448 2.060 1.182 2.953 2.504 2.291 0.930 1.403 1.319 3.426 2.660 2.397 2.940