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OpenXiangShan / XiangShan

Open-source high-performance RISC-V processor
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DCache: Move L2 refill error signal to refill_info #3063

Closed bosscharlie closed 2 weeks ago

bosscharlie commented 2 weeks ago

Error signal for L2 refill request is generated when mem_grant but sent to MainPipe in mainpipe_req with l2_hint, which is not correct. Move error signal to refill_info now.

XiangShanRobot commented 2 weeks ago
[Generated by IPC robot] commit: 160e66c035fa4b84f59326c1a988a9c944130473 commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
160e66c 1.808 0.447 2.043 1.187 2.938 2.508 2.291 0.921 1.369 1.441 3.454 2.658 2.399 2.932
master branch: commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
a7828dc 1.187 0.921 1.369 3.454 2.932
9f598f8
e975de6 1.808 0.447 2.043 1.187 2.938 2.508 2.291 0.921 1.369 1.441 3.454 2.658 2.399 2.932
ff9b84b 0.447 2.043 1.187 2.291 0.921 1.369 3.454 2.658 2.932
3bec463 1.808 0.447 2.043 1.187 2.938 2.508 2.291 0.921 1.369 1.441 3.454 2.658 2.399 2.932
2d12882 0.447 2.043 1.187 2.291 0.921 1.369 3.454 2.658 2.932
ef14270 1.827 0.448 2.048 1.190 2.938 2.508 2.289 0.932 1.369 1.410 3.445 2.672 2.398 2.932
5c5f442 1.827 0.448 2.048 1.190 2.938 2.508 2.289 0.932 1.369 1.410 3.445 2.672 2.398 2.932
d67c873 1.827 0.448 2.048 1.190 2.938 2.508 2.289 0.932 1.369 1.410 3.445 2.672 2.398 2.932