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OpenXiangShan / XiangShan

Open-source high-performance RISC-V processor
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Vfalu: fix ffagsEn logic for vfredunction #3116

Closed lewislzh closed 3 months ago

lewislzh commented 3 months ago 
 when fold , only some bits of fflags from vfalu0 are valid
 fflags vfredmin/max has to be masked
XiangShanRobot commented 3 months ago
[Generated by IPC robot] commit: 302354de2492e69af0b1a03c37e98e08668240df commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
302354d 1.828 0.451 2.036 1.184 2.938 2.497 2.196 0.935 1.381 1.280 3.183 2.666 2.403 2.961
master branch: commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
6b46af8 0.458 1.995 1.189 2.928 2.494 2.224 0.927 1.378 1.389 3.173 2.664 2.401 2.963
b92f844 1.804 0.458 1.995 1.189 2.928 2.494 2.224 0.927 1.368 1.389 3.173 2.664 2.401 2.963
fe98272
344cf5d 1.828 0.451 2.036 1.184 2.938 2.497 2.196 0.935 1.381 1.280 3.183 2.666 2.403 2.961
c4a59f1 1.812 0.451 2.036 1.193 2.941 2.507 2.197 0.934 1.381 1.397 3.181 2.665 2.403 2.961
5110577 1.812 0.451 2.043 1.199 2.941 2.507 2.196 0.934 1.373 1.397 3.181 2.669 2.403 2.961
0d9b3da 1.812 0.451 2.043 1.199 2.941 2.507 2.196 0.934 1.373 1.397 3.181 2.669 2.403 2.961
842df08 1.812 0.451 2.043 1.199 2.941 2.507 2.196 0.934 1.373 1.397 3.181 2.669 2.403 2.961
03b2841 1.812 0.451 2.047 1.199 2.941 2.507 2.196 0.934 1.373 1.397 3.181 2.669 2.403 2.961
762f2b3 1.812 0.451 2.043 1.199 2.941 2.507 2.196 0.934 1.373 1.397 3.181 2.669 2.403 2.961