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OpenXiangShan / XiangShan

Open-source high-performance RISC-V processor
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perf(IssueQueue): add 'wen' to the valid condition of each wbBusyTableWrite #3566

Closed xiaofeibao-xjtu closed 2 weeks ago

XiangShanRobot commented 2 weeks ago
[Generated by IPC robot] commit: c593761b80d3c5260a1554a3da85c9600277daab commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
c593761 1.855 0.450 2.695 1.186 2.832 2.488 2.401 0.919 1.379 1.454 3.415 2.765 2.423 3.212
master branch: commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
903ff89 1.855 0.450 2.695 1.186 2.822 2.490 2.401 0.919 1.379 1.454 3.362 2.751 2.418 3.212
cfebab2 1.865 0.450 2.695 1.186 2.822 2.490 2.401 0.919 1.379 1.454 3.362 2.751 2.418 3.212
bf652b4 1.855 2.695 1.186 2.822 2.490 0.919 1.379 1.454 3.362 2.418 3.212
f018fe8 1.865 0.450 2.695 1.186 2.822 2.490 2.401 0.919 1.379 1.454 3.362 2.751 2.418 3.212
5334e13 1.855 0.450 2.695 1.186 2.822 2.490 2.401 0.919 1.379 1.454 3.362 2.751 2.418 3.212
6962b4f 1.865 0.450 2.695 1.186 2.822 2.490 2.401 0.919 1.379 1.454 3.362 2.751 2.418 3.212
052738a 1.865 0.450 2.695 1.186 2.822 2.490 2.401 0.919 1.379 1.454 3.362 2.751 2.418 3.212
3e3345d 1.855 0.450 2.695 1.186 2.822 2.490 2.401 0.919 1.379 1.454 3.362 2.751 2.418 3.212