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OpenXiangShan / XiangShan

Open-source high-performance RISC-V processor
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fix(ROB): set basicDB false to save 35% time of ci perf #3582

Closed Maxpicca-Li closed 2 weeks ago

Tang-Haojin commented 2 weeks ago

Also save MC, etc.

XiangShanRobot commented 2 weeks ago
[Generated by IPC robot] commit: 66e19a11433cb4b6797288450fe8a1aec6f05359 commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
66e19a1 1.855 0.450 2.695 1.186 2.832 2.488 2.400 0.919 1.397 1.454 3.415 2.747 2.423 3.212
master branch: commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
093b2fc 1.186 0.919 1.454 3.415 3.212
0c658d9 0.450 2.695 1.186 2.400 0.919 1.397 3.415 2.747 3.212
0345934 1.855 0.450 2.695 1.186 2.832 2.488 2.400 0.919 1.397 1.454 3.415 2.747 2.423 3.212
63d67ef 1.865 2.695 1.186 2.832 2.488 0.919 1.397 1.454 3.415 2.423 3.212
e9f7c49 1.865 0.450 2.695 1.186 2.832 2.488 2.400 0.919 1.397 1.454 3.415 2.747 2.423 3.212
7acf8b7 1.855 0.450 2.695 1.186 2.832 2.488 2.400 0.919 1.397 1.454 3.415 2.747 2.423 3.212
78a6e80 1.855 0.450 2.695 1.186 2.832 2.488 2.400 0.919 1.397 1.454 3.415 2.747 2.423 3.212