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OpenXiangShan / XiangShan

Open-source high-performance RISC-V processor
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fix(Trigger): fix trigger's assign to exceptionGen in rob. #3585

Closed wissygh closed 1 week ago

XiangShanRobot commented 2 weeks ago
[Generated by IPC robot] commit: f3abb9cf424dd5dfd01ee7fc4f133adea4ae38bd commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
f3abb9c 1.855 0.450 2.695 1.186 2.832 2.488 2.400 0.919 1.397 1.454 3.415 2.747 2.423 3.212
master branch: commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
90d824c 0.450 2.695 1.186 2.400 0.919 1.397 3.415 2.747 3.212
8e93c8f 1.865 0.450 2.695 1.186 2.832 2.488 2.400 0.919 1.397 1.454 3.415 2.747 2.423 3.212
093b2fc 1.865 0.450 2.695 1.186 2.832 2.488 2.400 0.919 1.397 1.454 3.415 2.747 2.423 3.212
0c658d9 0.450 2.695 1.186 2.400 0.919 1.397 3.415 2.747 3.212
0345934 1.855 0.450 2.695 1.186 2.832 2.488 2.400 0.919 1.397 1.454 3.415 2.747 2.423 3.212
63d67ef 1.865 0.450 2.695 1.186 2.832 2.488 2.400 0.919 1.397 1.454 3.415 2.747 2.423 3.212
e9f7c49 1.865 0.450 2.695 1.186 2.832 2.488 2.400 0.919 1.397 1.454 3.415 2.747 2.423 3.212
7acf8b7 1.855 0.450 2.695 1.186 2.832 2.488 2.400 0.919 1.397 1.454 3.415 2.747 2.423 3.212