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OpenXiangShan / XiangShan

Open-source high-performance RISC-V processor
https://xiangshan.cc
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fix(Rob): block interrupt during flush handling #3689

Closed Tang-Haojin closed 1 month ago

Tang-Haojin commented 1 month ago

When an instruction raises an exception and needs flush pipe, rob needs several cycles to handle flushing. If an interrupt raised during these cycles, another unexpected flushing will be triggered, which causes complaint from frontend.

This commit avoids this by blocking interrupt marking process when rob is handling flushing.

XiangShanRobot commented 1 month ago
[Generated by IPC robot] commit: 65ebf3c1312074a639d90794a302aa1d5b9c1faa commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
65ebf3c 1.936 0.450 2.701 1.199 2.812 2.465 2.404 0.914 1.394 1.626 3.424 2.755 2.429 3.271
master branch: commit astar copy_and_run coremark gcc gromacs lbm linux mcf microbench milc namd povray wrf xalancbmk
b2e314e 0.450 2.701 2.404 1.394 2.755
5e0a22e 1.924 0.450 2.701 1.199 2.812 2.465 2.404 0.914 1.394 1.626 3.424 2.755 2.429 3.271
ca0aa83 1.924 0.450 2.701 1.199 2.812 2.465 2.404 0.914 1.394 1.626 3.424 2.755 2.429 3.271
b2564f6 1.936 0.450 2.701 1.199 2.812 2.465 2.404 0.914 1.394 1.626 3.424 2.755 2.429 3.271
cabb9f4 1.934 0.451 2.704 1.193 2.812 2.465 2.404 0.913 1.401 1.626 3.420 2.750 2.429 3.271
5f11990 1.934 0.451 2.704 1.193 2.812 2.465 2.402 0.913 1.401 1.626 3.415 2.750 2.429 3.271
c52cb3c 1.934 0.451 2.704 1.193 2.812 2.465 2.401 0.913 1.401 1.626 3.421 2.750 2.429 3.271
a94d0ab 1.934 0.451 2.704 1.193 2.812 2.465 2.402 0.913 1.401 1.626 3.421 2.750 2.429 3.271
1856091 1.934 0.451 2.704 1.194 2.812 2.465 2.401 0.913 1.401 1.626 3.421 2.743 2.429 3.271
bbb9b7b 1.934 0.451 2.704 1.194 2.812 2.465 2.400 0.913 1.401 1.626 3.421 2.743 2.429 3.271