search

OrbitNTNU / electronics-verilator

Contains makefiles and examples for Verilator.
0 stars 0 forks source link

Add support for displaying enums in gtkwave #8

Closed magnmaeh closed 6 months ago

magnmaeh commented 7 months ago

Enums can be used in Verilog code like this and are fairly common:

enum {IDLE, SETUP, ACCESS} state;

When the enums are displayed in gtkwave, they will by default be displayed as their numbers (i.e., 0, 1, 2). It would be better to display these as their names (i.e., IDLE, SETUP, ACCESS) instead.

magnmaeh commented 7 months ago

This is possible to do using some Python magic it seems. See https://pyvcd.readthedocs.io/en/latest/vcd.gtkw.html

magnmaeh commented 7 months ago

After looking further into this, the pyvcd API is extremely limiting. Without this API, it will be very challenging and too time-consuming to implement automatic display of enum variables. I'll instead add a guide on how to add enums manually in the README.

magnmaeh commented 7 months ago

After looking EVEN more into this, it seems possible to extend the Verilator class to write additional data to the .vcd file or generate a .gtkw file based on the enum generated by Verilator when / verilator_public / is used. :))