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Origen-SDK
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origen_sim
Plugin to enable Origen patterns to be run in a dynamic Verilog simulation
MIT License
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Better logging and Process Reaping
#9
ginty
closed
6 years ago
8
Comments go missing if time hasn't changed
#8
redxeth
closed
6 years ago
7
Misc updates
#7
ginty
closed
6 years ago
1
Added simulation capture and replay
#6
ginty
closed
6 years ago
1
Converted sim:build to a global command
#5
ginty
closed
6 years ago
8
Fast simulation option (irun)
#4
rlaj
closed
6 years ago
0
Handle stores for pin_groups
#3
rlaj
closed
7 years ago
0
incl files, -std=c99, alt_top
#2
rlaj
closed
7 years ago
0
Changed the pattern naming order
#1
Dieleman
closed
7 years ago
1
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