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OswaldHe / LevelST

[FPGA 2024] Source code and bitstream for LevelST: Stream-based Accelerator for Sparse Triangular Solver
MIT License
10 stars 1 forks source link

thanks but maybe version is wrong #9

Closed htprofessor closed 3 months ago

htprofessor commented 3 months ago

Thanks for your reply,zifan and I use Vitis 2023.2,my board is xilinx_u280_gen3x16_xdma_1_202211_1,so I need to generate my bitstream right? image but I cant find solver.xilinx_u280xdma**.hw_generate_bitstream.sh image

htprofessor commented 3 months ago

image maybe I need to modify on Autobridge source file,where is the source file sorry to bother u,Thanks so much

htprofessor commented 3 months ago

after I directly use bash run_tapa.sh.here are the errors image image and the contents of my "work.out" folder are image image

OswaldHe commented 3 months ago

Hi,

The whole flow only works for TAPA 2022. The most recent version has a significant change so I don't recommend you to use it. Also, it only works for Vitis/Vivado 2021.2, since we're using the old platform. If you're trying the new versions, you probably want to turn off Autobridge, but it may not give you the optimal results.