Closed OmegaPhil closed 6 years ago
and normally I use it to send X key events through antimicro without issue.
In this case you joypad is recognized like a keyboard and can not be considered as gamepad.
No - take a look into antimicro - I think it used to be called QJoypad.
If Onepad doesn't detect your gamepad that probably means SDL isn't not able to detect your joypad, but this is just an information popup and doesn't influence the plugin behavior. If your joypad was working before this update, it should be working on this one as well.
Concerning antimicro, if I understand the description, this program allows to use the gamepad on software/games with low or inexistant gamepad support. It probably convert SDL to X11 keys.
If it's not working at all, did you try to run PCSX2 without antimicro ?
Is your chroot setup correctly? I had this problem with SDL2 quite a while back, and it was because I didn't bind mount the /run directory. SDL2 uses libudev for device detection, and libudev uses the info in /run/udev (or wherever it is in your distro) to function properly.
Of course I ran it without antimicro... antimicro is not relevant to this problem, I was just giving an example of a program that knows the pad exists and one that I use all the time.
I have been playing pcsx2 on and off for a few years with the current setup.
@turtleli: Thanks, interesting point - this wasn't mounted in the chroot, I have done this now, but still no difference.
I've installed jstest-gtk in the chroot, and its happy detecting '/dev/input/js0' and '/dev/input/js1' (the former is port 1 which is populated), so theres no problem there. Is the udev functionality new?
I did a little test with strace to demonstrate what the programs are/aren't doing with the device files:
# strace -fe trace=file 2>&1 ./PCSX2-linux.sh | grep js0
# strace -fe trace=file 2>&1 jstest-gtk | grep js0
open("/dev/input/js0", O_RDONLY) = 5
So here it looks like udev is clueless about the controller but jstest knows what it is doing. If the udev change is new, sounds like I need to do a project to see what special configuration udev needs?
Hmm. Actually I might be wrong. I just tested and it works here without the /run directory. I think it required it before but maybe I'm not remembering things correctly. My SDL2 version is 2.0.4, I'm not sure that makes any difference though.
Try checking accesses to the /run, /dev/input and /sys directories. And maybe check the /dev/input/event* device permissions too.
Udev doesn't use js* device but event* device instead. I think there is an equivalent of jstest but for udev (maybe evtest or somethings close to it).
Thanks - sdl-jstest should be that program - its capable of listing the controller, but the sdl2 test program does not consider the controller a 'gamepad', its failing with SDL error 'Couldn't find mapping for device' (it doesn't say this but I've added the get error string in) - looking at 'libsdl2-2.0-0/libsdl2-2.0.4+dfsg1/src/joystick/SDL_gamecontrollerdb.h', there seems to be a small hardcoded list of devices (???), have stopped there so far.
For reference I confirmed ppsspp links to the SDL2 library and has no problems with the controller.
After some fiddling about I cracked it - /sys needs to be bind-mounted in the chroot, this is what libudev (which libSDL2 uses) actually reads (had to go through the source of pcsx2 and libsdl2, then got the hint via the pyudev documentation) - so anyone building and running pcsx2 in a minimal chroot will need to be told to do this for the new version.
For completeness' sake, SDL2 does have a hardcoded collection of controller mappings but that wasn't breaking things in this instance. With the unsupported state, using sdl2-test you get:
$ ./sdl2-jstest --list
Found 2 joystick(s)
Joystick Name: 'Twin USB Joystick'
Joystick GUID: 03000000100800000100000010010000
Joystick Number: 0
Number of Axes: 4
Number of Buttons: 12
Number of Hats: 1
Number of Balls: 0
GameController:
not a gamepad
Joystick Name: 'Twin USB Joystick'
Joystick GUID: 03000000100800000100000010010000
Joystick Number: 1
Number of Axes: 4
Number of Buttons: 12
Number of Hats: 1
Number of Balls: 0
GameController:
not a gamepad
'not a gamepad' is complete bullshit, that simply means SDL2 doesn't have the hardcoded mapping.
Getting at the SDL2 source, in the test directory there is a controllermap program - run this and you get a nice simple GUI that allows you to quickly build a mapping string.
You can now educate SDL2 by the following export, with my mapping as an example:
export SDL_GAMECONTROLLERCONFIG="03000000100800000100000010010000,Twin USB Joystick,platform:Linux,x:b3,a:b2,b:b1,y:b0,back:b8,start:b9,dpleft:h0.8,dpdown:h0.4,dpright:h0.2,dpup:h0.1,leftshoulder:b6,lefttrigger:b4,rightshoulder:b7,righttrigger:b5,leftstick:b10,rightstick:b11,leftx:a0,lefty:a1,rightx:a3,righty:a2,"
Unfortunately it didn't help this particular problem. See antimicro documentation for the source of the mapping stuff.
Gamepad api is a new sdl2 api. Unused currently on the code
Sorry if this is unrelated, but why is that both GUIDs for both joysticks are equal? Is it because SDL is padding the 16 bit unique ID into 128 bit with extra zeros? Since SDL uses libudev, would using _ioctl functions to get the unique id In that case make any difference?
Under Windows, DirectInput for instance, can get GUIDs that are really unique even for joysticks of the same brand! Is there a way to differentiate same brand/type connected joysticks other than using GUIDs under Linux? or using joystick index is the only way?
@RebelliousX
Here the SDL2 code. inpid
is based on the evdev ioctl.
/* We only need 16 bits for each of these; space them out to fill 128. */
/* Byteswap so devices get same GUID on little/big endian platforms. */
*(guid16++) = SDL_SwapLE16(inpid.bustype);
*(guid16++) = 0;
if (inpid.vendor && inpid.product && inpid.version) {
*(guid16++) = SDL_SwapLE16(inpid.vendor);
*(guid16++) = 0;
*(guid16++) = SDL_SwapLE16(inpid.product);
*(guid16++) = 0;
*(guid16++) = SDL_SwapLE16(inpid.version);
*(guid16++) = 0;
}
New onepad version available. Code is based on the SDL2 auto-setup feature. It should work now.
I have just rebuilt pcsx2 and selected OnePAD v2, on configuration when pressing 'Gamepad Configuration' I get the same bs error 'No gamepad detected.'.
pcsx2 is not being ran from a chroot so the previous /sys issue is irrelevant. For reference I haven't played with pcsx2 for a while.
Yes it work as SDL2, you need to export your config like the one you posted above
export SDL_GAMECONTROLLERCONFIG="03000000100800000100000010010000,Twin USB Joystick,platform:Linux,x:b3,a:b2,b:b1,y:b0,back:b8,start:b9,dpleft:h0.8,dpdown:h0.4,dpright:h0.2,dpup:h0.1,leftshoulder:b6,lefttrigger:b4,rightshoulder:b7,righttrigger:b5,leftstick:b10,rightstick:b11,leftx:a0,lefty:a1,rightx:a3,righty:a2,"
Once you manage to configured your pad, just send me the SDL_GAMECONTROLLERCONFIG value and I will put it in onepad db.
I've exported that in my launcher script, but no difference... you might want to get someone else to test, it'll take a while for me to reach this as a programming project.
Could you post me the emulog related to onepad. Those kinds of lines, you will have error instead but you got the idea.
onepad: controller (PS2700 Rumble Pad) detected, GUID:03000000a306000020f6000011010000
onepad: controller (Sony PLAYSTATION(R)3 Controller) detected, GUID:030000004c0500006802000011010000
onepad: controller (SAITEK P880) detected, GUID:03000000a30600000901000000010000
Note: I've moved to Devuan Testing since my last work on this ticket, the chroot I'm building in is still Debian Unstable, so there might be a mismatch with the libraries somehow... however pcsx2 and the used plugins appear to be OK to run regardless...
No mention of lines like that in emuLog.txt, and padLog.text just has 'PADinit'.
Here is the full emuLog.txt:
(PCSX2:12095): Gtk-WARNING **: Unable to locate theme engine in module_path: "xfce",
(PCSX2:12095): Gtk-WARNING **: Unable to locate theme engine in module_path: "xfce",
(PCSX2:12095): Gtk-WARNING **: Unable to locate theme engine in module_path: "xfce",
PCSX2 1.5.0-20170428112719 - compiled on Apr 28 2017
Savestate version: 0x9a0d0000
Host Machine Init:
Operating System = Linux 4.9.0-2-amd64 x86_64
Physical RAM = 32161 MB
CPU name = AMD FX(tm)-8350 Eight-Core Processor
Vendor/Model = AuthenticAMD (stepping 00)
CPU speed = 4.023 ghz (8 logical threads)
x86PType = Standard OEM
x86Flags = 178bfbff 3e98320b
x86EFlags = 2fd3fbff
x86 Features Detected:
SSE2.. SSE3.. SSSE3.. SSE4.1.. SSE4.2.. AVX.. FMA
SSE4a
Installing POSIX SIGSEGV handler...
Mapping host memory for virtual systems...
EE Main Memory @ 0x20000000 -> 0x22884000 [40mb]
IOP Main Memory (2mb) @ 0x24000000 -> 0x24211000 [2mb]
VU0/1 on-chip memory @ 0x28000000 -> 0x2800A000 [40kb]
Reserving memory for recompilers...
SuperVU0 Recompiler Cache @ 0x0E800000 -> 0x0F000000 [8mb]
SuperVU1 Recompiler Cache @ 0x0F000000 -> 0x0F800000 [8mb]
Micro VU0 Recompiler Cache @ 0x3C000000 -> 0x40000000 [64mb]
Micro VU1 Recompiler Cache @ 0x40000000 -> 0x44000000 [64mb]
R5900-32 Recompiler Cache @ 0x30000000 -> 0x34000000 [64mb]
R3000A Recompiler Cache @ 0x34000000 -> 0x36000000 [32mb]
VIF0 Unpack Recompiler Cache @ 0x36000000 -> 0x36800000 [8mb]
VIF1 Unpack Recompiler Cache @ 0x38000000 -> 0x38800000 [8mb]
Loading plugins from /mnt/storage-1/General/Emulators And ROMs/pcsx2/pcsx2-git/pcsx2/bin/plugins...
Bound GS: libGSdx.so [GSdx (GCC 6.3.0 AVX/AVX) 1.1.0]
Bound PAD: libonepad.so [OnePAD 20170428112719-Dev 2.0.0]
Bound SPU2: libspu2x-2.0.0.so [SPU2-X-Dev 2.0.0]
Bound CDVD: libCDVDnull.so [CDVDnull Driver 20170428112719 0.6.0]
Bound USB: libUSBnull-0.7.0.so [USBnull Driver 20170428112719 0.7.0]
Bound FW: libFWnull-0.7.0.so [FWnull Driver 20170428112719 0.7.0]
Bound DEV9: libdev9null-0.5.0.so [DEV9null Driver 20170428112719 0.5.0]
Plugins loaded successfully.
(GameDB) 9709 games on record (loaded in 196ms)
(GameDB) Unloading...
To get that I've started pcsx2, gone to the OnePad configuration and got the 'no gamepad' dialog, then exited.
Strange. Could you just start a game without trying the configuration gui. I think, it should print those kind of message.
fprintf(stderr, "onepad: Joystick (%s,GUID:%s) isn't yet supported by the SDL2 game controller API\n"
"Fortunately you can use AntiMicro (https://github.com/AntiMicro/antimicro) or Steam to configure your joystick\n"
"Please report it to us (https://github.com/PCSX2/pcsx2/issues) so we can add your joystick to our internal database.",
Edit: it should report the same stuff as ./sdl2-jstest
No real difference, just lots of output associated with running FFX:
(PCSX2:17722): Gtk-WARNING **: Unable to locate theme engine in module_path: "xfce",
(PCSX2:17722): Gtk-WARNING **: Unable to locate theme engine in module_path: "xfce",
(PCSX2:17722): Gtk-WARNING **: Unable to locate theme engine in module_path: "xfce",
PCSX2 1.5.0-20170428112719 - compiled on Apr 28 2017
Savestate version: 0x9a0d0000
Host Machine Init:
Operating System = Linux 4.9.0-2-amd64 x86_64
Physical RAM = 32161 MB
CPU name = AMD FX(tm)-8350 Eight-Core Processor
Vendor/Model = AuthenticAMD (stepping 00)
CPU speed = 4.023 ghz (8 logical threads)
x86PType = Standard OEM
x86Flags = 178bfbff 3e98320b
x86EFlags = 2fd3fbff
x86 Features Detected:
SSE2.. SSE3.. SSSE3.. SSE4.1.. SSE4.2.. AVX.. FMA
SSE4a
Installing POSIX SIGSEGV handler...
Mapping host memory for virtual systems...
EE Main Memory @ 0x20000000 -> 0x22884000 [40mb]
IOP Main Memory (2mb) @ 0x24000000 -> 0x24211000 [2mb]
VU0/1 on-chip memory @ 0x28000000 -> 0x2800A000 [40kb]
Reserving memory for recompilers...
SuperVU0 Recompiler Cache @ 0x0E800000 -> 0x0F000000 [8mb]
SuperVU1 Recompiler Cache @ 0x0F000000 -> 0x0F800000 [8mb]
Micro VU0 Recompiler Cache @ 0x3C000000 -> 0x40000000 [64mb]
Micro VU1 Recompiler Cache @ 0x40000000 -> 0x44000000 [64mb]
R5900-32 Recompiler Cache @ 0x30000000 -> 0x34000000 [64mb]
R3000A Recompiler Cache @ 0x34000000 -> 0x36000000 [32mb]
VIF0 Unpack Recompiler Cache @ 0x36000000 -> 0x36800000 [8mb]
VIF1 Unpack Recompiler Cache @ 0x38000000 -> 0x38800000 [8mb]
Loading plugins from /mnt/storage-1/General/Emulators And ROMs/pcsx2/pcsx2-git/pcsx2/bin/plugins...
Bound GS: libGSdx.so [GSdx (GCC 6.3.0 AVX/AVX) 1.1.0]
Bound PAD: libonepad.so [OnePAD 20170428112719-Dev 2.0.0]
Bound SPU2: libspu2x-2.0.0.so [SPU2-X-Dev 2.0.0]
Bound CDVD: libCDVDnull.so [CDVDnull Driver 20170428112719 0.6.0]
Bound USB: libUSBnull-0.7.0.so [USBnull Driver 20170428112719 0.7.0]
Bound FW: libFWnull-0.7.0.so [FWnull Driver 20170428112719 0.7.0]
Bound DEV9: libdev9null-0.5.0.so [DEV9null Driver 20170428112719 0.5.0]
Plugins loaded successfully.
(GameDB) 9709 games on record (loaded in 196ms)
HLE Host: Will load ELF:
HLE Notice: ELF does not have a path.
Initializing plugins...
Init GS
Init PAD
Init SPU2
* SPU2-X: Init SPU2 core 0
Reverb Parameter Update for Core 0:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0x00000000, 0x00000000
APF1_SIZE, APF2_SIZE 0x00000000, 0x00000000
APF1_VOL, APF2_VOL 0x00000000, 0x00000000
COMB1_VOL 0x00000000
COMB2_VOL 0x00000000
COMB3_VOL 0x00000000
COMB4_VOL 0x00000000
COMB1_L_SRC, COMB1_R_SRC 0x00000000, 0x00000000
COMB2_L_SRC, COMB2_R_SRC 0x00000000, 0x00000000
COMB3_L_SRC, COMB3_R_SRC 0x00000000, 0x00000000
COMB4_L_SRC, COMB4_R_SRC 0x00000000, 0x00000000
SAME_L_SRC, SAME_R_SRC 0x00000000, 0x00000000
DIFF_L_SRC, DIFF_R_SRC 0x00000000, 0x00000000
SAME_L_DST, SAME_R_DST 0x00000000, 0x00000000
DIFF_L_DST, DIFF_R_DST 0x00000000, 0x00000000
IIR_VOL, WALL_VOL 0x00000000, 0x00000000
APF1_L_DST 0x00000000
APF1_R_DST 0x00000000
APF2_L_DST 0x00000000
APF2_R_DST 0x00000000
EffectsBufferSize 0x8
----------------------------------------------------------
* SPU2-X: Init SPU2 core 1
Reverb Parameter Update for Core 1:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0x00000000, 0x00000000
APF1_SIZE, APF2_SIZE 0x00000000, 0x00000000
APF1_VOL, APF2_VOL 0x00000000, 0x00000000
COMB1_VOL 0x00000000
COMB2_VOL 0x00000000
COMB3_VOL 0x00000000
COMB4_VOL 0x00000000
COMB1_L_SRC, COMB1_R_SRC 0x00000000, 0x00000000
COMB2_L_SRC, COMB2_R_SRC 0x00000000, 0x00000000
COMB3_L_SRC, COMB3_R_SRC 0x00000000, 0x00000000
COMB4_L_SRC, COMB4_R_SRC 0x00000000, 0x00000000
SAME_L_SRC, SAME_R_SRC 0x00000000, 0x00000000
DIFF_L_SRC, DIFF_R_SRC 0x00000000, 0x00000000
SAME_L_DST, SAME_R_DST 0x00000000, 0x00000000
DIFF_L_DST, DIFF_R_DST 0x00000000, 0x00000000
IIR_VOL, WALL_VOL 0x00000000, 0x00000000
APF1_L_DST 0x00000000
APF1_R_DST 0x00000000
APF2_L_DST 0x00000000
APF2_R_DST 0x00000000
EffectsBufferSize 0x8
----------------------------------------------------------
Init CDVD
Init USB
USBnull plugin version 0,7
Initializing USBnull
Init FW
Init DEV9
dev9null plugin version 0,5
Initializing dev9null
Plugins initialized successfully.
Patches: No CRC found, using 00000000 instead.
Overall 0 Widescreen hacks loaded
(Wide Screen Cheats DB) Patches Loaded: 0
Opening plugins...
Opening GS
OpenGL information. GPU: Gallium 0.4 on AMD TAHITI (DRM 2.48.0 / 4.9.0-2-amd64, LLVM 3.9.1). Vendor: X.Org. Driver: (Core Profile) Mesa 13.0.6
INFO: GL_EXT_texture_filter_anisotropic is available
INFO: GL_ARB_gpu_shader5 is available
INFO: GL_ARB_viewport_array is available
INFO: GL_ARB_shader_image_load_store is available
INFO: GL_ARB_clear_texture is available
INFO: GL_ARB_direct_state_access is available
INFO: GL_ARB_texture_barrier is available
INFO: GL_ARB_get_texture_sub_image is available
Current Renderer: OpenGL (Hardware renderer)
Available VRAM/RAM:3840MB for textures
Opening PAD
GSdx Lookup CRC:0
Opening SPU2
ALSA lib pcm.c:2495:(snd_pcm_open_noupdate) Unknown PCM cards.pcm.rear
ALSA lib pcm.c:2495:(snd_pcm_open_noupdate) Unknown PCM cards.pcm.center_lfe
ALSA lib pcm.c:2495:(snd_pcm_open_noupdate) Unknown PCM cards.pcm.side
ALSA lib pcm_route.c:867:(find_matching_chmap) Found no matching channel map
Expression 'alsa_snd_pcm_hw_params_set_period_size_near( pcm, hwParams, &alsaPeriodFrames, &dir )' failed in 'src/hostapi/alsa/pa_linux_alsa.c', line: 924
ALSA lib pcm_direct.c:1605:(_snd_pcm_direct_get_slave_ipc_offset) Invalid value for card
ALSA lib pcm_direct.c:1605:(_snd_pcm_direct_get_slave_ipc_offset) Invalid value for card
ALSA lib pcm_dmix.c:990:(snd_pcm_dmix_open) The dmix plugin supports only playback stream
ALSA lib pcm_hw.c:1713:(_snd_pcm_hw_open) Invalid value for card
Cannot connect to server socket err = No such file or directory
Cannot connect to server request channel
jack server is not running or cannot be started
JackShmReadWritePtr::~JackShmReadWritePtr - Init not done for -1, skipping unlock
JackShmReadWritePtr::~JackShmReadWritePtr - Init not done for -1, skipping unlock
Cannot connect to server socket err = No such file or directory
Cannot connect to server request channel
jack server is not running or cannot be started
JackShmReadWritePtr::~JackShmReadWritePtr - Init not done for -1, skipping unlock
JackShmReadWritePtr::~JackShmReadWritePtr - Init not done for -1, skipping unlock
Cannot connect to server socket err = No such file or directory
Cannot connect to server request channel
jack server is not running or cannot be started
JackShmReadWritePtr::~JackShmReadWritePtr - Init not done for -1, skipping unlock
JackShmReadWritePtr::~JackShmReadWritePtr - Init not done for -1, skipping unlock
Cannot connect to server socket err = No such file or directory
Cannot connect to server request channel
jack server is not running or cannot be started
JackShmReadWritePtr::~JackShmReadWritePtr - Init not done for -1, skipping unlock
JackShmReadWritePtr::~JackShmReadWritePtr - Init not done for -1, skipping unlock
Cannot connect to server socket err = No such file or directory
Cannot connect to server request channel
jack server is not running or cannot be started
JackShmReadWritePtr::~JackShmReadWritePtr - Init not done for -1, skipping unlock
JackShmReadWritePtr::~JackShmReadWritePtr - Init not done for -1, skipping unlock
* SPU2-X: Enumerating PortAudio devices:
*** Device 0: 'HDA ATI SB: ALC889 Digital (hw:0,1)' (ALSA)
*** Device 1: 'HDA ATI HDMI: 0 (hw:1,3)' (ALSA)
*** Device 2: 'HDA ATI HDMI: 1 (hw:1,7)' (ALSA)
*** Device 3: 'HDA ATI HDMI: 2 (hw:1,8)' (ALSA)
*** Device 4: 'HDA ATI HDMI: 3 (hw:1,9)' (ALSA)
*** Device 5: 'HDA ATI HDMI: 4 (hw:1,10)' (ALSA)
*** Device 6: 'HDA ATI HDMI: 5 (hw:1,11)' (ALSA)
*** Device 7: 'sysdefault' (ALSA)
*** Device 8: 'iec958' (ALSA)
*** Device 9: 'spdif' (ALSA)
*** Device 10: 'filewav' (ALSA)
*** Device 11: 'default' (ALSA) (selected)
*** Device 12: 'dmix' (ALSA)
* SPU2 > Using normal 2 speaker stereo output.
Opening CDVD
isoFile open ok: /mnt/storage-1/General/Emulators And ROMs/pcsx2/games/FINAL_FANTASY_X.ISO
Image type = DVD
blocks = 2245200
offset = 0
blocksize = 2048
blockoffset = 24
* CDVD Disk Open: DVD, Single layer or unknown:
* * Track 1: Data (Mode 1) (2245200 sectors)
(IsoFS) Block 0x10: Primary partition info.
(IsoFS) Filesystem is ISO9660
Opening USB
Opening FW
Opening DEV9
Opening USBnull.
Opening Dev9null.
McdSlot 0 [File]: /mnt/storage-1/General/Emulators And ROMs/pcsx2/pcsx2-git/pcsx2/bin/memcards/Mcd001.ps2
McdSlot 1 [File]: /mnt/storage-1/General/Emulators And ROMs/pcsx2/pcsx2-git/pcsx2/bin/memcards/Mcd002.ps2
Plugins opened successfully.
Allocating host memory for virtual systems...
EE/iR5900-32 Recompiler Reset
iR3000A Recompiler reset.
Resetting host memory for virtual systems...
Bios Found: USA v01.60(07/02/2002) Console
BIOS r module not found, skipping...
BIOS r module not found, skipping...
BIOS e module not found, skipping...
Generating SSE-optimized unpacking functions for VIF interpreters...
VIF SSE-optimized Unpacking Functions @ 0xE3204000 -> 0xE3214000 [64kb]
Unpack function generation complete. Generated function statistics:
Reserved buffer : 65536 bytes @ 0xE3204000
x86 code generated : 6904 bytes
* SPU2-X: Init SPU2 core 0
Reverb Parameter Update for Core 0:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0x00000000, 0x00000000
APF1_SIZE, APF2_SIZE 0x00000000, 0x00000000
APF1_VOL, APF2_VOL 0x00000000, 0x00000000
COMB1_VOL 0x00000000
COMB2_VOL 0x00000000
COMB3_VOL 0x00000000
COMB4_VOL 0x00000000
COMB1_L_SRC, COMB1_R_SRC 0x00000000, 0x00000000
COMB2_L_SRC, COMB2_R_SRC 0x00000000, 0x00000000
COMB3_L_SRC, COMB3_R_SRC 0x00000000, 0x00000000
COMB4_L_SRC, COMB4_R_SRC 0x00000000, 0x00000000
SAME_L_SRC, SAME_R_SRC 0x00000000, 0x00000000
DIFF_L_SRC, DIFF_R_SRC 0x00000000, 0x00000000
SAME_L_DST, SAME_R_DST 0x00000000, 0x00000000
DIFF_L_DST, DIFF_R_DST 0x00000000, 0x00000000
IIR_VOL, WALL_VOL 0x00000000, 0x00000000
APF1_L_DST 0x00000000
APF1_R_DST 0x00000000
APF2_L_DST 0x00000000
APF2_R_DST 0x00000000
EffectsBufferSize 0x8
----------------------------------------------------------
* SPU2-X: Init SPU2 core 1
Reverb Parameter Update for Core 1:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0x00000000, 0x00000000
APF1_SIZE, APF2_SIZE 0x00000000, 0x00000000
APF1_VOL, APF2_VOL 0x00000000, 0x00000000
COMB1_VOL 0x00000000
COMB2_VOL 0x00000000
COMB3_VOL 0x00000000
COMB4_VOL 0x00000000
COMB1_L_SRC, COMB1_R_SRC 0x00000000, 0x00000000
COMB2_L_SRC, COMB2_R_SRC 0x00000000, 0x00000000
COMB3_L_SRC, COMB3_R_SRC 0x00000000, 0x00000000
COMB4_L_SRC, COMB4_R_SRC 0x00000000, 0x00000000
SAME_L_SRC, SAME_R_SRC 0x00000000, 0x00000000
DIFF_L_SRC, DIFF_R_SRC 0x00000000, 0x00000000
SAME_L_DST, SAME_R_DST 0x00000000, 0x00000000
DIFF_L_DST, DIFF_R_DST 0x00000000, 0x00000000
IIR_VOL, WALL_VOL 0x00000000, 0x00000000
APF1_L_DST 0x00000000
APF1_R_DST 0x00000000
APF2_L_DST 0x00000000
APF2_R_DST 0x00000000
EffectsBufferSize 0x8
----------------------------------------------------------
*Setting ram.
______> stretch: Reset.
RegisterLibraryEntries: excepman version 1.01
RegisterLibraryEntries: intrman version 1.02
RegisterLibraryEntries: ssbusc version 1.01
RegisterLibraryEntries: dmacman version 1.02
RegisterLibraryEntries: timrman version 1.01
RegisterLibraryEntries: sysclib version 1.01
RegisterLibraryEntries: stdio version 1.01
RegisterLibraryEntries: heaplib version 1.01
*Unknown 8 bit read at address 1f80146e
Frame buffer size set to 512x1280 (2048x5120)
RegisterLibraryEntries: thbase version 1.01
RegisterLibraryEntries: thevent version 1.01
RegisterLibraryEntries: thsemap version 1.01
RegisterLibraryEntries: thmsgbx version 1.01
RegisterLibraryEntries: thfpool version 1.01
RegisterLibraryEntries: thvpool version 1.01
RegisterIntrHandler: intr INT_RTC5, handler fcb0
RegisterLibraryEntries: vblank version 1.01
RegisterIntrHandler: intr INT_VBLANK, handler 122a4
RegisterIntrHandler: intr INT_EVBLANK, handler 1235c
RegisterLibraryEntries: ioman version 1.02
RegisterLibraryEntries: modload version 1.01
RegisterLibraryEntries: romdrv version 2.01
RegisterLibraryEntries: stdio version 1.02
RegisterLibraryEntries: sifman version 1.01
RegisterIntrHandler: intr INT_dmaSIF0, handler 16d94
*Unknown 8 bit read at address 1f80146e
*Unknown 8 bit read at address 1f80146e
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
RegisterLibraryEntries: sifcmd version 1.01
RegisterIntrHandler: intr INT_dmaSIF1, handler 183c0
Patches: No CRC found, using 00000000 instead.
Overall 0 Widescreen hacks loaded
(Wide Screen Cheats DB) Patches Loaded: 0
(IsoFS) Block 0x10: Primary partition info.
(IsoFS) Filesystem is ISO9660
(SYSTEM.CNF) Detected PS2 Disc = cdrom0:\SCES_504.90;1
(SYSTEM.CNF) Software version = 1.00
(SYSTEM.CNF) Disc region type = PAL
(IsoFS) Block 0x10: Primary partition info.
(IsoFS) Filesystem is ISO9660
Initializing Elf: 4731160 bytes
ELF (cdrom0:\SCES_504.90;1) Game CRC = 0xA39517AB, EntryPoint = 0x00100008
(IsoFS) Block 0x10: Primary partition info.
(IsoFS) Filesystem is ISO9660
(SYSTEM.CNF) Detected PS2 Disc = cdrom0:\SCES_504.90;1
(SYSTEM.CNF) Software version = 1.00
(SYSTEM.CNF) Disc region type = PAL
RegisterLibraryEntries: cdvdman version 1.01
RegisterIntrHandler: intr INT_CDROM, handler 1f620
RegisterLibraryEntries: cdvdfsv version 1.01
RegisterLibraryEntries: secrman version 1.03
RegisterLibraryEntries: eesync version 1.01
sifcmd sceSifRegisterRpc: rpc_id 80000592
sifcmd sceSifRegisterRpc: rpc_id 8000059a
sifcmd sceSifRegisterRpc: rpc_id 80000593
sifcmd sceSifRegisterRpc: rpc_id 80000597
sifcmd sceSifRegisterRpc: rpc_id 80000595
sifcmd sceSifRegisterRpc: rpc_id 80000006
sifcmd sceSifRegisterRpc: rpc_id 80000001
sifcmd sceSifRegisterRpc: rpc_id 80000003
*Unknown 8 bit read at address 1f80146e
*Unknown 8 bit read at address 1f80146e
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
*Unknown 8 bit read at address 1f80146e
*Unknown 8 bit read at address 1f80146e
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
RegisterLibraryEntries: excepman version 1.01
RegisterLibraryEntries: intrman version 1.02
RegisterLibraryEntries: ssbusc version 1.01
RegisterLibraryEntries: dmacman version 1.02
RegisterLibraryEntries: timrman version 1.01
RegisterLibraryEntries: sysclib version 1.01
RegisterLibraryEntries: stdio version 1.01
RegisterLibraryEntries: heaplib version 1.01
RegisterLibraryEntries: thbase version 1.01
RegisterLibraryEntries: thevent version 1.01
RegisterLibraryEntries: thsemap version 1.01
RegisterLibraryEntries: thmsgbx version 1.01
RegisterLibraryEntries: thfpool version 1.01
RegisterLibraryEntries: thvpool version 1.01
RegisterIntrHandler: intr INT_RTC5, handler fcb0
RegisterLibraryEntries: vblank version 1.01
RegisterIntrHandler: intr INT_VBLANK, handler 122a4
RegisterIntrHandler: intr INT_EVBLANK, handler 1235c
RegisterLibraryEntries: ioman version 1.02
RegisterLibraryEntries: modload version 1.01
RegisterLibraryEntries: romdrv version 2.01
RegisterLibraryEntries: stdio version 1.02
RegisterLibraryEntries: sifman version 1.01
RegisterLibraryEntries: cdvdman version 1.01
RegisterIntrHandler: intr INT_CDROM, handler 1a620
RegisterLibraryEntries: secrman version 1.03
RegisterLibraryEntries: sio2man version 1.01
RegisterIntrHandler: intr INT_SIO2, handler 37908
RegisterLibraryEntries: mcman version 1.01
RegisterLibraryEntries: excepman version 1.01
RegisterLibraryEntries: intrman version 1.02
RegisterLibraryEntries: ssbusc version 1.01
RegisterLibraryEntries: dmacman version 1.02
RegisterLibraryEntries: timrman version 1.01
RegisterLibraryEntries: sysclib version 1.01
RegisterLibraryEntries: stdio version 1.01
RegisterLibraryEntries: heaplib version 1.01
RegisterLibraryEntries: thbase version 1.01
RegisterLibraryEntries: thevent version 1.01
RegisterLibraryEntries: thsemap version 1.01
RegisterLibraryEntries: thmsgbx version 1.01
RegisterLibraryEntries: thfpool version 1.01
RegisterLibraryEntries: thvpool version 1.01
RegisterIntrHandler: intr INT_RTC5, handler fcb0
RegisterLibraryEntries: vblank version 1.01
RegisterIntrHandler: intr INT_VBLANK, handler 122a4
RegisterIntrHandler: intr INT_EVBLANK, handler 1235c
RegisterLibraryEntries: ioman version 1.02
RegisterLibraryEntries: modload version 1.01
RegisterLibraryEntries: romdrv version 2.01
RegisterLibraryEntries: stdio version 1.02
RegisterLibraryEntries: sifman version 1.01
RegisterIntrHandler: intr INT_dmaSIF0, handler 16d94
RegisterLibraryEntries: sifcmd version 1.01
RegisterIntrHandler: intr INT_dmaSIF1, handler 183c0
RegisterLibraryEntries: cdvdman version 1.01
RegisterIntrHandler: intr INT_CDROM, handler 20fc0
RegisterLibraryEntries: cdvdfsv version 1.01
RegisterLibraryEntries: secrman version 1.03
RegisterLibraryEntries: eesync version 1.01
* SPU2-X: SPDIF Mode set to 0900
* SPU2-X: SPDIF Media set to 0200
* SPU2-X: SPDIF Unknown Register 2 set to 0008
* SPU2-X: Core 0 AutoDMAControl set to 0 (at cycle 13760)
* SPU2-X: Core 1 AutoDMAControl set to 0 (at cycle 13760)
RegisterIntrHandler: intr INT_dmaSPU, handler 4d158
RegisterIntrHandler: intr INT_dmaSPU2, handler 4d158
RegisterIntrHandler: intr INT_SPU, handler 4cd3c
* SPU2-X: Play Mode Set to PCM Clone (1).
* SPU2-X: ATTR bit 0 set to 1
Reverb Parameter Update for Core 0:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0x00000000, 0x00000000
APF1_SIZE, APF2_SIZE 0x00000000, 0x00000000
APF1_VOL, APF2_VOL 0x00000000, 0x00000000
COMB1_VOL 0x00000000
COMB2_VOL 0x00000000
COMB3_VOL 0x00000000
COMB4_VOL 0x00000000
COMB1_L_SRC, COMB1_R_SRC 0x00000000, 0x00000000
COMB2_L_SRC, COMB2_R_SRC 0x00000000, 0x00000000
COMB3_L_SRC, COMB3_R_SRC 0x00000000, 0x00000000
COMB4_L_SRC, COMB4_R_SRC 0x00000000, 0x00000000
SAME_L_SRC, SAME_R_SRC 0x00000000, 0x00000000
DIFF_L_SRC, DIFF_R_SRC 0x00000000, 0x00000000
SAME_L_DST, SAME_R_DST 0x00000000, 0x00000000
DIFF_L_DST, DIFF_R_DST 0x00000000, 0x00000000
IIR_VOL, WALL_VOL 0x00000000, 0x00000000
APF1_L_DST 0x00000000
APF1_R_DST 0x00000000
APF2_L_DST 0x00000000
APF2_R_DST 0x00000000
EffectsBufferSize 0x8
----------------------------------------------------------
Reverb Parameter Update for Core 1:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0x00000000, 0x00000000
APF1_SIZE, APF2_SIZE 0x00000000, 0x00000000
APF1_VOL, APF2_VOL 0x00000000, 0x00000000
COMB1_VOL 0x00000000
COMB2_VOL 0x00000000
COMB3_VOL 0x00000000
COMB4_VOL 0x00000000
COMB1_L_SRC, COMB1_R_SRC 0x00000000, 0x00000000
COMB2_L_SRC, COMB2_R_SRC 0x00000000, 0x00000000
COMB3_L_SRC, COMB3_R_SRC 0x00000000, 0x00000000
COMB4_L_SRC, COMB4_R_SRC 0x00000000, 0x00000000
SAME_L_SRC, SAME_R_SRC 0x00000000, 0x00000000
DIFF_L_SRC, DIFF_R_SRC 0x00000000, 0x00000000
SAME_L_DST, SAME_R_DST 0x00000000, 0x00000000
DIFF_L_DST, DIFF_R_DST 0x00000000, 0x00000000
IIR_VOL, WALL_VOL 0x00000000, 0x00000000
APF1_L_DST 0x00000000
APF1_R_DST 0x00000000
APF2_L_DST 0x00000000
APF2_R_DST 0x00000000
EffectsBufferSize 0x8
----------------------------------------------------------
* SPU2-X: Core 0 AutoDMAControl set to 1 (at cycle 13788)
* SPU2-X: Core 1 AutoDMAControl set to 2 (at cycle 13788)
* SPU2-X: Core 0 AutoDMAControl set to 0 (at cycle 14080)
* SPU2-X: Core 1 AutoDMAControl set to 0 (at cycle 14080)
RegisterLibraryEntries: sio2man version 1.02
RegisterIntrHandler: intr INT_SIO2, handler 4d140
RegisterLibraryEntries: mtapman version 1.02
RegisterLibraryEntries: mcman version 2.03
RegisterLibraryEntries: mcserv version 1.01
RegisterLibraryEntries: padman version 1.02
sifcmd sceSifRegisterRpc: rpc_id 80000901
sifcmd sceSifRegisterRpc: rpc_id 80000902
sifcmd sceSifRegisterRpc: rpc_id 80000903
sifcmd sceSifRegisterRpc: rpc_id 800009fe
sifcmd sceSifRegisterRpc: rpc_id 800009ff
sifcmd sceSifRegisterRpc: rpc_id 80000601
sifcmd sceSifRegisterRpc: rpc_id 80000100
sifcmd sceSifRegisterRpc: rpc_id 80000101
sifcmd sceSifRegisterRpc: rpc_id 80000596
sifcmd sceSifRegisterRpc: rpc_id 80000592
sifcmd sceSifRegisterRpc: rpc_id 8000059a
sifcmd sceSifRegisterRpc: rpc_id 80000593
sifcmd sceSifRegisterRpc: rpc_id 80000597
sifcmd sceSifRegisterRpc: rpc_id 80000595
sifcmd sceSifRegisterRpc: rpc_id 80000006
sifcmd sceSifRegisterRpc: rpc_id 80000001
sifcmd sceSifRegisterRpc: rpc_id 80000003
sifcmd sceSifRegisterRpc: rpc_id 80000400
*Unknown 16 bit read at address 1f80146e
*Unknown 16 bit read at address 1f80146e
*Unknown 16 bit read at address 1f80146e
*Unknown 16 bit read at address 1f80146e
RegisterIntrHandler: intr INT_CDROM, handler 20fc0
* SPU2-X: Play Mode Set to Normal (0).
* SPU2-X: Core 0 AutoDMAControl set to 0 (at cycle 41023)
* SPU2-X: Core 1 AutoDMAControl set to 0 (at cycle 41025)
* SPU2-X: ATTR bit 0 set to 0
RegisterIntrHandler: intr INT_dmaSPU2, handler 94dc0
RegisterIntrHandler: intr INT_dmaSPU, handler 94ed4
RegisterIntrHandler: intr INT_SPU, handler 95e5c
* SPU2-X: Play Mode Set to PCM Clone (1).
* SPU2-X: ATTR bit 0 set to 1
Reverb Parameter Update for Core 0:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0x00000000, 0x00000000
APF1_SIZE, APF2_SIZE 0x00000000, 0x00000000
APF1_VOL, APF2_VOL 0x00000000, 0x00000000
COMB1_VOL 0x00000000
COMB2_VOL 0x00000000
COMB3_VOL 0x00000000
COMB4_VOL 0x00000000
COMB1_L_SRC, COMB1_R_SRC 0x00000000, 0x00000000
COMB2_L_SRC, COMB2_R_SRC 0x00000000, 0x00000000
COMB3_L_SRC, COMB3_R_SRC 0x00000000, 0x00000000
COMB4_L_SRC, COMB4_R_SRC 0x00000000, 0x00000000
SAME_L_SRC, SAME_R_SRC 0x00000000, 0x00000000
DIFF_L_SRC, DIFF_R_SRC 0x00000000, 0x00000000
SAME_L_DST, SAME_R_DST 0x00000000, 0x00000000
DIFF_L_DST, DIFF_R_DST 0x00000000, 0x00000000
IIR_VOL, WALL_VOL 0x00000000, 0x00000000
APF1_L_DST 0x00000000
APF1_R_DST 0x00000000
APF2_L_DST 0x00000000
APF2_R_DST 0x00000000
EffectsBufferSize 0x8
----------------------------------------------------------
Reverb Parameter Update for Core 1:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0x00000000, 0x00000000
APF1_SIZE, APF2_SIZE 0x00000000, 0x00000000
APF1_VOL, APF2_VOL 0x00000000, 0x00000000
COMB1_VOL 0x00000000
COMB2_VOL 0x00000000
COMB3_VOL 0x00000000
COMB4_VOL 0x00000000
COMB1_L_SRC, COMB1_R_SRC 0x00000000, 0x00000000
COMB2_L_SRC, COMB2_R_SRC 0x00000000, 0x00000000
COMB3_L_SRC, COMB3_R_SRC 0x00000000, 0x00000000
COMB4_L_SRC, COMB4_R_SRC 0x00000000, 0x00000000
SAME_L_SRC, SAME_R_SRC 0x00000000, 0x00000000
DIFF_L_SRC, DIFF_R_SRC 0x00000000, 0x00000000
SAME_L_DST, SAME_R_DST 0x00000000, 0x00000000
DIFF_L_DST, DIFF_R_DST 0x00000000, 0x00000000
IIR_VOL, WALL_VOL 0x00000000, 0x00000000
APF1_L_DST 0x00000000
APF1_R_DST 0x00000000
APF2_L_DST 0x00000000
APF2_R_DST 0x00000000
EffectsBufferSize 0x8
----------------------------------------------------------
* SPU2-X: Play Mode Set to Normal (0).
* SPU2-X: Core 0 AutoDMAControl set to 0 (at cycle 41118)
* SPU2-X: Core 1 AutoDMAControl set to 0 (at cycle 41121)
* SPU2-X: ATTR bit 0 set to 0
RegisterIntrHandler: intr INT_dmaSPU2, handler 94dc0
RegisterIntrHandler: intr INT_dmaSPU, handler 94ed4
RegisterIntrHandler: intr INT_SPU, handler 95e5c
* SPU2-X: Play Mode Set to PCM Clone (1).
* SPU2-X: ATTR bit 0 set to 1
Reverb Parameter Update for Core 0:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0x00000000, 0x00000000
APF1_SIZE, APF2_SIZE 0x00000000, 0x00000000
APF1_VOL, APF2_VOL 0x00000000, 0x00000000
COMB1_VOL 0x00000000
COMB2_VOL 0x00000000
COMB3_VOL 0x00000000
COMB4_VOL 0x00000000
COMB1_L_SRC, COMB1_R_SRC 0x00000000, 0x00000000
COMB2_L_SRC, COMB2_R_SRC 0x00000000, 0x00000000
COMB3_L_SRC, COMB3_R_SRC 0x00000000, 0x00000000
COMB4_L_SRC, COMB4_R_SRC 0x00000000, 0x00000000
SAME_L_SRC, SAME_R_SRC 0x00000000, 0x00000000
DIFF_L_SRC, DIFF_R_SRC 0x00000000, 0x00000000
SAME_L_DST, SAME_R_DST 0x00000000, 0x00000000
DIFF_L_DST, DIFF_R_DST 0x00000000, 0x00000000
IIR_VOL, WALL_VOL 0x00000000, 0x00000000
APF1_L_DST 0x00000000
APF1_R_DST 0x00000000
APF2_L_DST 0x00000000
APF2_R_DST 0x00000000
EffectsBufferSize 0x10008
----------------------------------------------------------
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xfc80f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xfca0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xfcc0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xfce0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xfd00f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xfd20f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xfd40f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xfd60f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xfd80f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xfda0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xfdc0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xfde0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xfe00f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xfe20f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xfe40f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xfe60f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xfe80f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xfea0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xfec0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xfee0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xff00f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xff20f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xff40f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xff60f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xff80f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xffa0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xffc0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xffe0f Size: 0x200
Reverb Parameter Update for Core 0:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0xffff8000, 0xffff8000
APF1_SIZE, APF2_SIZE 0x0000038c, 0x000002a4
APF1_VOL, APF2_VOL 0x00005680, 0x000052c0
COMB1_VOL 0x00004fa8
COMB2_VOL 0xffffbce0
COMB3_VOL 0x00004510
COMB4_VOL 0xffffbef0
COMB1_L_SRC, COMB1_R_SRC 0x00003424, 0x000028f0
COMB2_L_SRC, COMB2_R_SRC 0x00002f64, 0x000025cc
COMB3_L_SRC, COMB3_R_SRC 0x00001fb0, 0x000012c0
COMB4_L_SRC, COMB4_R_SRC 0x00001bbc, 0x00000f48
SAME_L_SRC, SAME_R_SRC 0x00002d64, 0x00002368
DIFF_L_SRC, DIFF_R_SRC 0x000017a8, 0x00000c74
SAME_L_DST, SAME_R_DST 0x000037ec, 0x00002d60
DIFF_L_DST, DIFF_R_DST 0x00002364, 0x000017a4
IIR_VOL, WALL_VOL 0x00006f60, 0xffffa680
APF1_L_DST 0x00000c70
APF1_R_DST 0x000008e0
APF2_L_DST 0x00000550
APF2_R_DST 0x000002a8
EffectsBufferSize 0x37f0
----------------------------------------------------------
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xec80f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xeca0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xecc0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xece0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xed00f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xed20f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xed40f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xed60f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xed80f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xeda0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xedc0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xede0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xee00f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xee20f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xee40f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xee60f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xee80f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xeea0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xeec0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xeee0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xef00f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xef20f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xef40f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xef60f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xef80f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xefa0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xefc0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x2409d5c0 TSA: 0xefe0f Size: 0x200
Reverb Parameter Update for Core 1:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0xffff8000, 0xffff8000
APF1_SIZE, APF2_SIZE 0x0000038c, 0x000002a4
APF1_VOL, APF2_VOL 0x00005680, 0x000052c0
COMB1_VOL 0x00004fa8
COMB2_VOL 0xffffbce0
COMB3_VOL 0x00004510
COMB4_VOL 0xffffbef0
COMB1_L_SRC, COMB1_R_SRC 0x00003424, 0x000028f0
COMB2_L_SRC, COMB2_R_SRC 0x00002f64, 0x000025cc
COMB3_L_SRC, COMB3_R_SRC 0x00001fb0, 0x000012c0
COMB4_L_SRC, COMB4_R_SRC 0x00001bbc, 0x00000f48
SAME_L_SRC, SAME_R_SRC 0x00002d64, 0x00002368
DIFF_L_SRC, DIFF_R_SRC 0x00000c74, 0x000017a8
SAME_L_DST, SAME_R_DST 0x000037ec, 0x00002d60
DIFF_L_DST, DIFF_R_DST 0x00002364, 0x000017a4
IIR_VOL, WALL_VOL 0x00006f60, 0xffffa680
APF1_L_DST 0x00000c70
APF1_R_DST 0x000008e0
APF2_L_DST 0x00000550
APF2_R_DST 0x000002a8
EffectsBufferSize 0x37f0
----------------------------------------------------------
RegisterIntrHandler: intr INT_RTC1, handler 836e0
(UpdateVSyncRate) Mode Changed to DVD NTSC.
(UpdateVSyncRate) FPS Limit Changed : 59.94 fps
Set GS CRTC configuration. Interlace Interlaced. Field Type FRAME. Mode DVD NTSC 640x448 @ ??.???
*Unknown 8 bit read at address 1f80146e
Set GS CRTC configuration. Interlace Interlaced. Field Type FRAME. Mode DVD NTSC 640x448 @ ??.???
*Unknown 8 bit read at address 1f80146e
microVU1: Cached Prog = [000] [PC=0000] [List=01] (Cache=0.000%) [0.0mb]
microVU1: Cached Prog = [001] [PC=0028] [List=01] (Cache=0.000%) [0.0mb]
Gif Unit - GS packet size exceeded VU memory size!
microVU1: Cached Prog = [002] [PC=00d8] [List=01] (Cache=0.006%) [0.0mb]
microVU1: Branch VI-Delay (1) [0270][002]
microVU1: Branch VI-Delay (1) [0478][002]
microVU1: Branch VI-Delay (1) [0478][002]
microVU1: Branch VI-Delay (1) [0478][002]
microVU1: Branch VI-Delay (1) [0478][002]
microVU1: Cached Prog = [003] [PC=0308] [List=01] (Cache=0.065%) [0.0mb]
microVU1: Branch VI-Delay (1) [0270][003]
Possible old value used in COP2 code
267000 4A0002FF vnop
267004 48C08000 ctc2 zero, Status
267008 4BAB42EC vsub.xyw vf11, vf08, vf11
26700c *4BA8632C vsub.xyw vf12, vf12, vf08
267010 4A2B4B3C vmove.w, vf11, vf09
267014 4A2C533C vmove.w, vf12, vf10
267018 4A0002FF vnop
26701c 20E70010 addi a3, a3, 0x0010
267020 D8E80000 lqc2 vf08, 0x 0(a3)
267024 2108FFFF addi t0, t0, 0xFFFF
267028 =48428000 cfc2 v0, Status
26702c 304200C0 andi v0,v0, 0x00C0
267030 10400004 beq v0, zero, ->$0x00267044
267034 00000000 nop
Frame buffer size set to 640x1280 (2560x5120)
______> stretch: Reset.
cdvdReadKey(0, 0, 75)
(IsoFS) Block 0x10: Primary partition info.
(IsoFS) Filesystem is ISO9660
(SYSTEM.CNF) Detected PS2 Disc = cdrom0:\SCES_504.90;1
(SYSTEM.CNF) Software version = 1.00
(SYSTEM.CNF) Disc region type = PAL
CDVD.KEY = B1,69,71,38,D5,4C,05
cdvdReadKey(0, 0, 3075)
(IsoFS) Block 0x10: Primary partition info.
(IsoFS) Filesystem is ISO9660
(SYSTEM.CNF) Detected PS2 Disc = cdrom0:\SCES_504.90;1
(SYSTEM.CNF) Software version = 1.00
(SYSTEM.CNF) Disc region type = PAL
CDVD.KEY = B1,69,71,38,D5,00,01
memcardErase cmd: 00??
memcardErase cmd: 00??
memcardErase cmd: 00??
memcardErase cmd: 00??
memcardErase cmd: 00??
*Unknown 8 bit read at address 1f80146e
*Unknown 8 bit read at address 1f80146e
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
(IsoFS) Block 0x10: Primary partition info.
(IsoFS) Filesystem is ISO9660
(SYSTEM.CNF) Detected PS2 Disc = cdrom0:\SCES_504.90;1
(SYSTEM.CNF) Software version = 1.00
(SYSTEM.CNF) Disc region type = PAL
(IsoFS) Block 0x10: Primary partition info.
(IsoFS) Filesystem is ISO9660
(SYSTEM.CNF) Detected PS2 Disc = cdrom0:\SCES_504.90;1
(SYSTEM.CNF) Software version = 1.00
(SYSTEM.CNF) Disc region type = PAL
RegisterLibraryEntries: excepman version 1.01
RegisterLibraryEntries: intrman version 1.02
RegisterLibraryEntries: ssbusc version 1.01
RegisterLibraryEntries: dmacman version 1.02
RegisterLibraryEntries: timrman version 1.01
RegisterLibraryEntries: sysclib version 1.01
RegisterLibraryEntries: stdio version 1.01
RegisterLibraryEntries: heaplib version 1.01
RegisterLibraryEntries: thbase version 1.01
RegisterLibraryEntries: thevent version 1.01
RegisterLibraryEntries: thsemap version 1.01
RegisterLibraryEntries: thmsgbx version 1.01
RegisterLibraryEntries: thfpool version 1.01
RegisterLibraryEntries: thvpool version 1.01
RegisterIntrHandler: intr INT_RTC5, handler fcb0
RegisterLibraryEntries: vblank version 1.01
RegisterIntrHandler: intr INT_VBLANK, handler 122a4
RegisterIntrHandler: intr INT_EVBLANK, handler 1235c
RegisterLibraryEntries: ioman version 1.02
RegisterLibraryEntries: modload version 1.01
RegisterLibraryEntries: romdrv version 2.01
RegisterLibraryEntries: stdio version 1.02
RegisterLibraryEntries: sifman version 1.01
RegisterLibraryEntries: cdvdman version 1.01
RegisterIntrHandler: intr INT_CDROM, handler 1a620
RegisterLibraryEntries: secrman version 1.03
RegisterLibraryEntries: sio2man version 1.01
RegisterIntrHandler: intr INT_SIO2, handler 37908
RegisterLibraryEntries: mcman version 1.01
RegisterLibraryEntries: excepman version 1.01
RegisterLibraryEntries: intrman version 1.02
RegisterLibraryEntries: ssbusc version 1.01
RegisterLibraryEntries: dmacman version 1.02
RegisterLibraryEntries: timrman version 1.01
RegisterLibraryEntries: sysclib version 1.01
RegisterLibraryEntries: stdio version 1.01
RegisterLibraryEntries: heaplib version 1.01
RegisterLibraryEntries: thbase version 1.01
RegisterLibraryEntries: thevent version 1.01
RegisterLibraryEntries: thsemap version 1.01
RegisterLibraryEntries: thmsgbx version 1.01
RegisterLibraryEntries: thfpool version 1.01
RegisterLibraryEntries: thvpool version 1.01
RegisterIntrHandler: intr INT_RTC5, handler fcb0
RegisterLibraryEntries: vblank version 1.01
RegisterIntrHandler: intr INT_VBLANK, handler 122a4
RegisterIntrHandler: intr INT_EVBLANK, handler 1235c
RegisterLibraryEntries: ioman version 1.02
RegisterLibraryEntries: modload version 1.01
RegisterLibraryEntries: romdrv version 2.01
RegisterLibraryEntries: stdio version 1.02
RegisterLibraryEntries: sifman version 1.01
RegisterIntrHandler: intr INT_dmaSIF0, handler 16d94
RegisterLibraryEntries: sifcmd version 1.01
RegisterIntrHandler: intr INT_dmaSIF1, handler 183c0
RegisterLibraryEntries: cdvdman version 1.01
RegisterIntrHandler: intr INT_CDROM, handler 205c0
RegisterLibraryEntries: cdvdfsv version 1.01
RegisterLibraryEntries: secrman version 1.03
RegisterLibraryEntries: eesync version 1.01
sifcmd sceSifRegisterRpc: rpc_id 80000592
sifcmd sceSifRegisterRpc: rpc_id 8000059a
sifcmd sceSifRegisterRpc: rpc_id 80000593
sifcmd sceSifRegisterRpc: rpc_id 80000597
sifcmd sceSifRegisterRpc: rpc_id 80000595
sifcmd sceSifRegisterRpc: rpc_id 80000006
sifcmd sceSifRegisterRpc: rpc_id 80000001
sifcmd sceSifRegisterRpc: rpc_id 80000003
*Unknown 8 bit read at address 1f80146e
*Unknown 8 bit read at address 1f80146e
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
sifcmd sceSifRegisterRpc: rpc_id 80000601
RegisterIntrHandler: intr INT_dmaSPU2, handler 5d5c0
RegisterIntrHandler: intr INT_dmaSPU, handler 5d6d4
RegisterIntrHandler: intr INT_SPU, handler 5e65c
* SPU2-X: Transfer Start Address out of bounds. TSA is 1fffe0
Reverb Parameter Update for Core 1:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0x00000000, 0x00000000
APF1_SIZE, APF2_SIZE 0x00000000, 0x00000000
APF1_VOL, APF2_VOL 0x00000000, 0x00000000
COMB1_VOL 0x00000000
COMB2_VOL 0x00000000
COMB3_VOL 0x00000000
COMB4_VOL 0x00000000
COMB1_L_SRC, COMB1_R_SRC 0x00000000, 0x00000000
COMB2_L_SRC, COMB2_R_SRC 0x00000000, 0x00000000
COMB3_L_SRC, COMB3_R_SRC 0x00000000, 0x00000000
COMB4_L_SRC, COMB4_R_SRC 0x00000000, 0x00000000
SAME_L_SRC, SAME_R_SRC 0x00000000, 0x00000000
DIFF_L_SRC, DIFF_R_SRC 0x00000000, 0x00000000
SAME_L_DST, SAME_R_DST 0x00000004, 0x00000004
DIFF_L_DST, DIFF_R_DST 0x00000004, 0x00000004
IIR_VOL, WALL_VOL 0x00000000, 0x00000000
APF1_L_DST 0x00000000
APF1_R_DST 0x00000000
APF2_L_DST 0x00000000
APF2_R_DST 0x00000000
EffectsBufferSize 0x8
----------------------------------------------------------
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xfc80f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xfca0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xfcc0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xfce0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xfd00f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xfd20f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xfd40f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xfd60f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xfd80f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xfda0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xfdc0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xfde0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xfe00f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xfe20f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xfe40f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xfe60f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xfe80f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xfea0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xfec0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xfee0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xff00f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xff20f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xff40f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xff60f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xff80f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xffa0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xffc0f Size: 0x200
* SPU2 DMA Write > Misaligned target. Core: 1 IOP: 0x24065dc0 TSA: 0xffe0f Size: 0x200
Reverb Parameter Update for Core 0:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0xffff8000, 0xffff8000
APF1_SIZE, APF2_SIZE 0x0000038c, 0x000002a4
APF1_VOL, APF2_VOL 0x00005680, 0x000052c0
COMB1_VOL 0x00004fa8
COMB2_VOL 0xffffbce0
COMB3_VOL 0x00004510
COMB4_VOL 0xffffbef0
COMB1_L_SRC, COMB1_R_SRC 0x00003424, 0x000028f0
COMB2_L_SRC, COMB2_R_SRC 0x00002f64, 0x000025cc
COMB3_L_SRC, COMB3_R_SRC 0x00001fb0, 0x000012c0
COMB4_L_SRC, COMB4_R_SRC 0x00001bbc, 0x00000f48
SAME_L_SRC, SAME_R_SRC 0x00002d64, 0x00002368
DIFF_L_SRC, DIFF_R_SRC 0x000017a8, 0x00000c74
SAME_L_DST, SAME_R_DST 0x000037ec, 0x00002d60
DIFF_L_DST, DIFF_R_DST 0x00002364, 0x000017a4
IIR_VOL, WALL_VOL 0x00006f60, 0xffffa680
APF1_L_DST 0x00000c70
APF1_R_DST 0x000008e0
APF2_L_DST 0x00000550
APF2_R_DST 0x000002a8
EffectsBufferSize 0x37f0
----------------------------------------------------------
(UpdateVSyncRate) Mode Changed to NTSC.
Set GS CRTC configuration. Interlace Interlaced. Field Type FIELD. Mode NTSC 640x448 @ 59.940 (59.82)
*Unknown 8 bit read at address 1f80146e
*Unknown 8 bit read at address 1f80146e
RegisterIntrHandler: intr INT_CDROM, handler 205c0
______> stretch: Reset.
RegisterIntrHandler: intr INT_dmaSPU2, handler 0
RegisterIntrHandler: intr INT_dmaSPU, handler 0
*Unknown 8 bit read at address 1f80146e
*Unknown 8 bit read at address 1f80146e
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
(IsoFS) Block 0x10: Primary partition info.
(IsoFS) Filesystem is ISO9660
(SYSTEM.CNF) Detected PS2 Disc = cdrom0:\SCES_504.90;1
(SYSTEM.CNF) Software version = 1.00
(SYSTEM.CNF) Disc region type = PAL
(IsoFS) Block 0x10: Primary partition info.
(IsoFS) Filesystem is ISO9660
(SYSTEM.CNF) Detected PS2 Disc = cdrom0:\SCES_504.90;1
(SYSTEM.CNF) Software version = 1.00
(SYSTEM.CNF) Disc region type = PAL
RegisterLibraryEntries: excepman version 1.01
RegisterLibraryEntries: intrman version 1.02
RegisterLibraryEntries: ssbusc version 1.01
RegisterLibraryEntries: dmacman version 1.02
RegisterLibraryEntries: timrman version 1.01
RegisterLibraryEntries: sysclib version 1.01
RegisterLibraryEntries: stdio version 1.01
RegisterLibraryEntries: heaplib version 1.01
RegisterLibraryEntries: thbase version 1.01
RegisterLibraryEntries: thevent version 1.01
RegisterLibraryEntries: thsemap version 1.01
RegisterLibraryEntries: thmsgbx version 1.01
RegisterLibraryEntries: thfpool version 1.01
RegisterLibraryEntries: thvpool version 1.01
RegisterIntrHandler: intr INT_RTC5, handler fcb0
RegisterLibraryEntries: vblank version 1.01
RegisterIntrHandler: intr INT_VBLANK, handler 122a4
RegisterIntrHandler: intr INT_EVBLANK, handler 1235c
RegisterLibraryEntries: ioman version 1.02
RegisterLibraryEntries: modload version 1.01
RegisterLibraryEntries: romdrv version 2.01
RegisterLibraryEntries: stdio version 1.02
RegisterLibraryEntries: sifman version 1.01
RegisterLibraryEntries: cdvdman version 1.01
RegisterIntrHandler: intr INT_CDROM, handler 1a620
RegisterLibraryEntries: secrman version 1.03
RegisterLibraryEntries: sio2man version 1.01
RegisterIntrHandler: intr INT_SIO2, handler 37908
RegisterLibraryEntries: mcman version 1.01
RegisterLibraryEntries: excepman version 1.01
RegisterLibraryEntries: intrman version 1.02
RegisterLibraryEntries: ssbusc version 1.01
RegisterLibraryEntries: dmacman version 1.02
RegisterLibraryEntries: timrman version 1.01
RegisterLibraryEntries: sysclib version 1.01
RegisterLibraryEntries: stdio version 1.01
RegisterLibraryEntries: heaplib version 1.01
RegisterLibraryEntries: thbase version 1.01
RegisterLibraryEntries: thevent version 1.01
RegisterLibraryEntries: thsemap version 1.01
RegisterLibraryEntries: thmsgbx version 1.01
RegisterLibraryEntries: thfpool version 1.01
RegisterLibraryEntries: thvpool version 1.01
RegisterIntrHandler: intr INT_RTC5, handler fcb0
RegisterLibraryEntries: vblank version 1.01
RegisterIntrHandler: intr INT_VBLANK, handler 122a4
RegisterIntrHandler: intr INT_EVBLANK, handler 1235c
RegisterLibraryEntries: ioman version 1.02
RegisterLibraryEntries: modload version 1.01
RegisterLibraryEntries: romdrv version 2.01
RegisterLibraryEntries: stdio version 1.02
RegisterLibraryEntries: sifman version 1.01
RegisterIntrHandler: intr INT_dmaSIF0, handler 16d94
RegisterLibraryEntries: sifcmd version 1.01
RegisterIntrHandler: intr INT_dmaSIF1, handler 183c0
RegisterLibraryEntries: cdvdman version 1.01
RegisterIntrHandler: intr INT_CDROM, handler 205c0
RegisterLibraryEntries: cdvdfsv version 1.01
RegisterLibraryEntries: secrman version 1.03
RegisterLibraryEntries: eesync version 1.01
sifcmd sceSifRegisterRpc: rpc_id 80000592
sifcmd sceSifRegisterRpc: rpc_id 8000059a
sifcmd sceSifRegisterRpc: rpc_id 80000593
sifcmd sceSifRegisterRpc: rpc_id 80000597
sifcmd sceSifRegisterRpc: rpc_id 80000595
sifcmd sceSifRegisterRpc: rpc_id 80000006
sifcmd sceSifRegisterRpc: rpc_id 80000001
sifcmd sceSifRegisterRpc: rpc_id 80000003
cdvdReadKey(0, 0, 75)
(IsoFS) Block 0x10: Primary partition info.
(IsoFS) Filesystem is ISO9660
(SYSTEM.CNF) Detected PS2 Disc = cdrom0:\SCES_504.90;1
(SYSTEM.CNF) Software version = 1.00
(SYSTEM.CNF) Disc region type = PAL
CDVD.KEY = B1,69,71,38,D5,4C,05
cdvdReadKey(0, 0, 75)
(IsoFS) Block 0x10: Primary partition info.
(IsoFS) Filesystem is ISO9660
(SYSTEM.CNF) Detected PS2 Disc = cdrom0:\SCES_504.90;1
(SYSTEM.CNF) Software version = 1.00
(SYSTEM.CNF) Disc region type = PAL
CDVD.KEY = B1,69,71,38,D5,4C,05
*Unknown 8 bit read at address 1f80146e
*Unknown 8 bit read at address 1f80146e
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
microVU0: Waiting on VU1 thread to access VU1 regs!
Elf entry point @ 0x00100008 about to get recompiled. Load patches first.
(GameDB) E Gamefix: IpuWaitHack
Overall 0 Widescreen hacks loaded
Loading patch 'A39517AB.pnach' from archive '/mnt/storage-1/General/Emulators And ROMs/pcsx2/pcsx2-git/pcsx2/bin/cheats_ws.zip'
comment: Final Fantasy X (PAL-E) [SCES-50490] 16:9 Widescreen Hack, Render Fix & Progressive Scan
(Wide Screen Cheats DB) Patches Loaded: 7
(GameDB) E Gamefix: IpuWaitHack
Overall 0 Widescreen hacks loaded
Loading patch 'A39517AB.pnach' from archive '/mnt/storage-1/General/Emulators And ROMs/pcsx2/pcsx2-git/pcsx2/bin/cheats_ws.zip'
comment: Final Fantasy X (PAL-E) [SCES-50490] 16:9 Widescreen Hack, Render Fix & Progressive Scan
(Wide Screen Cheats DB) Patches Loaded: 7
iR3000A Recompiler reset.
EE/iR5900-32 Recompiler Reset
______> stretch: Reset.
(UpdateVSyncRate) Mode Changed to PAL.
(UpdateVSyncRate) FPS Limit Changed : 50.00 fps
Set GS CRTC configuration. Interlace Interlaced. Field Type FIELD. Mode PAL 640x512 @ 50.000 (49.76)
*Unknown 8 bit read at address 1f80146e
*Unknown 8 bit read at address 1f80146e
Set GS CRTC configuration. Interlace Interlaced. Field Type FIELD. Mode PAL 640x512 @ 50.000 (49.76)
*Unknown 8 bit read at address 1f80146e
*Unknown 8 bit read at address 1f80146e
RegisterIntrHandler: intr INT_CDROM, handler 205c0
RegisterLibraryEntries: excepman version 1.01
RegisterLibraryEntries: intrman version 1.02
RegisterLibraryEntries: ssbusc version 1.01
RegisterLibraryEntries: dmacman version 1.02
RegisterLibraryEntries: timrman version 1.01
RegisterLibraryEntries: sysclib version 1.01
RegisterLibraryEntries: stdio version 1.01
RegisterLibraryEntries: heaplib version 1.01
RegisterLibraryEntries: thbase version 1.01
RegisterLibraryEntries: thevent version 1.01
RegisterLibraryEntries: thsemap version 1.01
RegisterLibraryEntries: thmsgbx version 1.01
RegisterLibraryEntries: thfpool version 1.01
RegisterLibraryEntries: thvpool version 1.01
RegisterIntrHandler: intr INT_RTC5, handler fcb0
RegisterLibraryEntries: vblank version 1.01
RegisterIntrHandler: intr INT_VBLANK, handler 122a4
RegisterIntrHandler: intr INT_EVBLANK, handler 1235c
RegisterLibraryEntries: ioman version 1.02
RegisterLibraryEntries: modload version 1.01
RegisterLibraryEntries: romdrv version 2.01
GSdx Lookup CRC:A39517AB
RegisterLibraryEntries: stdio version 1.02
RegisterLibraryEntries: sifman version 1.01
RegisterLibraryEntries: cdvdman version 1.01
RegisterIntrHandler: intr INT_CDROM, handler 1a620
RegisterLibraryEntries: secrman version 1.03
RegisterLibraryEntries: sio2man version 1.01
RegisterIntrHandler: intr INT_SIO2, handler 37908
RegisterLibraryEntries: mcman version 1.01
RegisterLibraryEntries: excepman version 1.01
RegisterLibraryEntries: intrman version 1.02
RegisterLibraryEntries: ssbusc version 1.01
RegisterLibraryEntries: dmacman version 1.02
RegisterLibraryEntries: timrman version 1.02
RegisterLibraryEntries: sysclib version 1.03
RegisterLibraryEntries: stdio version 1.02
RegisterLibraryEntries: heaplib version 1.01
RegisterLibraryEntries: thbase version 1.01
RegisterLibraryEntries: thevent version 1.01
RegisterLibraryEntries: thsemap version 1.01
RegisterLibraryEntries: thmsgbx version 1.01
RegisterLibraryEntries: thfpool version 1.01
RegisterLibraryEntries: thvpool version 1.01
RegisterIntrHandler: intr INT_RTC5, handler 10750
RegisterLibraryEntries: vblank version 1.01
RegisterIntrHandler: intr INT_VBLANK, handler 12da4
RegisterIntrHandler: intr INT_EVBLANK, handler 12e5c
RegisterLibraryEntries: ioman version 1.04
RegisterLibraryEntries: modload version 1.05
RegisterLibraryEntries: romdrv version 2.01
RegisterLibraryEntries: stdio version 1.03
RegisterLibraryEntries: sifman version 1.01
RegisterIntrHandler: intr INT_dmaSIF0, handler 1a194
RegisterLibraryEntries: sifcmd version 1.01
RegisterIntrHandler: intr INT_dmaSIF1, handler 1bcdc
RegisterLibraryEntries: cdvdman version 1.01
RegisterIntrHandler: intr INT_CDROM, handler 231a0
RegisterLibraryEntries: cdvdfsv version 1.01
RegisterLibraryEntries: secrman version 1.03
RegisterLibraryEntries: eesync version 1.01
sifcmd sceSifRegisterRpc: rpc_id 80000592
sifcmd sceSifRegisterRpc: rpc_id 8000059a
sifcmd sceSifRegisterRpc: rpc_id 80000593
sifcmd sceSifRegisterRpc: rpc_id 80000597
sifcmd sceSifRegisterRpc: rpc_id 80000595
sifcmd sceSifRegisterRpc: rpc_id 80000006
sifcmd sceSifRegisterRpc: rpc_id 80000001
sifcmd sceSifRegisterRpc: rpc_id 80000003
RegisterIntrHandler: intr INT_CDROM, handler 231a0
RegisterLibraryEntries: sio2man version 2.03
RegisterIntrHandler: intr INT_SIO2, handler 50880
RegisterLibraryEntries: padman version 2.03
sifcmd sceSifRegisterRpc: rpc_id 80000100
sifcmd sceSifRegisterRpc: rpc_id 80000101
RegisterLibraryEntries: mcman version 2.06
RegisterLibraryEntries: mcserv version 2.01
sifcmd sceSifRegisterRpc: rpc_id 80000400
RegisterLibraryEntries: libsd version 1.04
sifcmd sceSifRegisterRpc: rpc_id 1001
sifcmd sceSifRegisterRpc: rpc_id 1000
* SPU2-X: Play Mode Set to Normal (0).
* SPU2-X: Core 0 AutoDMAControl set to 0 (at cycle 724923)
* SPU2-X: Core 1 AutoDMAControl set to 0 (at cycle 724923)
* SPU2-X: ATTR bit 0 set to 0
Reverb Parameter Update for Core 0:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0xffff8000, 0xffff8000
APF1_SIZE, APF2_SIZE 0x0000038c, 0x000002a4
APF1_VOL, APF2_VOL 0x00005680, 0x000052c0
COMB1_VOL 0x00004fa8
COMB2_VOL 0xffffbce0
COMB3_VOL 0x00004510
COMB4_VOL 0xffffbef0
COMB1_L_SRC, COMB1_R_SRC 0x00003424, 0x000028f0
COMB2_L_SRC, COMB2_R_SRC 0x00002f64, 0x000025cc
COMB3_L_SRC, COMB3_R_SRC 0x00001fb0, 0x000012c0
COMB4_L_SRC, COMB4_R_SRC 0x00001bbc, 0x00000f48
SAME_L_SRC, SAME_R_SRC 0x00002d64, 0x00002368
DIFF_L_SRC, DIFF_R_SRC 0x000017a8, 0x00000c74
SAME_L_DST, SAME_R_DST 0x000037ec, 0x00002d60
DIFF_L_DST, DIFF_R_DST 0x00002364, 0x000017a4
IIR_VOL, WALL_VOL 0x00006f60, 0xffffa680
APF1_L_DST 0x00000c70
APF1_R_DST 0x000008e0
APF2_L_DST 0x00000550
APF2_R_DST 0x000002a8
EffectsBufferSize 0x8
----------------------------------------------------------
Reverb Parameter Update for Core 1:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0x00000000, 0x00000000
APF1_SIZE, APF2_SIZE 0x00000000, 0x00000000
APF1_VOL, APF2_VOL 0x00000000, 0x00000000
COMB1_VOL 0x00000000
COMB2_VOL 0x00000000
COMB3_VOL 0x00000000
COMB4_VOL 0x00000000
COMB1_L_SRC, COMB1_R_SRC 0x00000000, 0x00000000
COMB2_L_SRC, COMB2_R_SRC 0x00000000, 0x00000000
COMB3_L_SRC, COMB3_R_SRC 0x00000000, 0x00000000
COMB4_L_SRC, COMB4_R_SRC 0x00000000, 0x00000000
SAME_L_SRC, SAME_R_SRC 0x00000000, 0x00000000
DIFF_L_SRC, DIFF_R_SRC 0x00000000, 0x00000000
SAME_L_DST, SAME_R_DST 0x00000004, 0x00000004
DIFF_L_DST, DIFF_R_DST 0x00000004, 0x00000004
IIR_VOL, WALL_VOL 0x00000000, 0x00000000
APF1_L_DST 0x00000000
APF1_R_DST 0x00000000
APF2_L_DST 0x00000000
APF2_R_DST 0x00000000
EffectsBufferSize 0x8
----------------------------------------------------------
* SPU2-X: Play Mode Set to PCM Clone (1).
* SPU2-X: ATTR bit 0 set to 1
RegisterIntrHandler: intr INT_dmaSPU, handler 86298
RegisterIntrHandler: intr INT_dmaSPU2, handler 86298
RegisterIntrHandler: intr INT_SPU, handler 84c30
Reverb Parameter Update for Core 1:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0x00000000, 0x00000000
APF1_SIZE, APF2_SIZE 0x00000000, 0x00000000
APF1_VOL, APF2_VOL 0x00000000, 0x00000000
COMB1_VOL 0x00000000
COMB2_VOL 0x00000000
COMB3_VOL 0x00000000
COMB4_VOL 0x00000000
COMB1_L_SRC, COMB1_R_SRC 0x00000000, 0x00000000
COMB2_L_SRC, COMB2_R_SRC 0x00000000, 0x00000000
COMB3_L_SRC, COMB3_R_SRC 0x00000000, 0x00000000
COMB4_L_SRC, COMB4_R_SRC 0x00000000, 0x00000000
SAME_L_SRC, SAME_R_SRC 0x00000000, 0x00000000
DIFF_L_SRC, DIFF_R_SRC 0x00000000, 0x00000000
SAME_L_DST, SAME_R_DST 0x00000004, 0x00000004
DIFF_L_DST, DIFF_R_DST 0x00000004, 0x00000004
IIR_VOL, WALL_VOL 0x00000000, 0x00000000
APF1_L_DST 0x00000000
APF1_R_DST 0x00000000
APF2_L_DST 0x00000000
APF2_R_DST 0x00000000
EffectsBufferSize 0x10008
----------------------------------------------------------
Reverb Parameter Update for Core 0:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0xffff8000, 0xffff8000
APF1_SIZE, APF2_SIZE 0x0000038c, 0x000002a4
APF1_VOL, APF2_VOL 0x00005680, 0x000052c0
COMB1_VOL 0x00004fa8
COMB2_VOL 0xffffbce0
COMB3_VOL 0x00004510
COMB4_VOL 0xffffbef0
COMB1_L_SRC, COMB1_R_SRC 0x00003424, 0x000028f0
COMB2_L_SRC, COMB2_R_SRC 0x00002f64, 0x000025cc
COMB3_L_SRC, COMB3_R_SRC 0x00001fb0, 0x000012c0
COMB4_L_SRC, COMB4_R_SRC 0x00001bbc, 0x00000f48
SAME_L_SRC, SAME_R_SRC 0x00002d64, 0x00002368
DIFF_L_SRC, DIFF_R_SRC 0x000017a8, 0x00000c74
SAME_L_DST, SAME_R_DST 0x000037ec, 0x00002d60
DIFF_L_DST, DIFF_R_DST 0x00002364, 0x000017a4
IIR_VOL, WALL_VOL 0x00006f60, 0xffffa680
APF1_L_DST 0x00000c70
APF1_R_DST 0x000008e0
APF2_L_DST 0x00000550
APF2_R_DST 0x000002a8
EffectsBufferSize 0x8
----------------------------------------------------------
Reverb Parameter Update for Core 0:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0xffff8000, 0xffff8000
APF1_SIZE, APF2_SIZE 0x0000038c, 0x000002a4
APF1_VOL, APF2_VOL 0x00005680, 0x000052c0
COMB1_VOL 0x00004fa8
COMB2_VOL 0xffffbce0
COMB3_VOL 0x00004510
COMB4_VOL 0xffffbef0
COMB1_L_SRC, COMB1_R_SRC 0x00003424, 0x000028f0
COMB2_L_SRC, COMB2_R_SRC 0x00002f64, 0x000025cc
COMB3_L_SRC, COMB3_R_SRC 0x00001fb0, 0x000012c0
COMB4_L_SRC, COMB4_R_SRC 0x00001bbc, 0x00000f48
SAME_L_SRC, SAME_R_SRC 0x00002d64, 0x00002368
DIFF_L_SRC, DIFF_R_SRC 0x000017a8, 0x00000c74
SAME_L_DST, SAME_R_DST 0x000037ec, 0x00002d60
DIFF_L_DST, DIFF_R_DST 0x00002364, 0x000017a4
IIR_VOL, WALL_VOL 0x00006f60, 0xffffa680
APF1_L_DST 0x00000c70
APF1_R_DST 0x000008e0
APF2_L_DST 0x00000550
APF2_R_DST 0x000002a8
EffectsBufferSize 0x37f0
----------------------------------------------------------
Reverb Parameter Update for Core 1:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0xffff8000, 0xffff8000
APF1_SIZE, APF2_SIZE 0x0000038c, 0x000002a4
APF1_VOL, APF2_VOL 0x00005680, 0x000052c0
COMB1_VOL 0x00004fa8
COMB2_VOL 0xffffbce0
COMB3_VOL 0x00004510
COMB4_VOL 0xffffbef0
COMB1_L_SRC, COMB1_R_SRC 0x00003424, 0x000028f0
COMB2_L_SRC, COMB2_R_SRC 0x00002f64, 0x000025cc
COMB3_L_SRC, COMB3_R_SRC 0x00001fb0, 0x000012c0
COMB4_L_SRC, COMB4_R_SRC 0x00001bbc, 0x00000f48
SAME_L_SRC, SAME_R_SRC 0x00002d64, 0x00002368
DIFF_L_SRC, DIFF_R_SRC 0x00000c74, 0x000017a8
SAME_L_DST, SAME_R_DST 0x000037ec, 0x00002d60
DIFF_L_DST, DIFF_R_DST 0x00002364, 0x000017a4
IIR_VOL, WALL_VOL 0x00006f60, 0xffffa680
APF1_L_DST 0x00000c70
APF1_R_DST 0x000008e0
APF2_L_DST 0x00000550
APF2_R_DST 0x000002a8
EffectsBufferSize 0x37f0
----------------------------------------------------------
* SPU2-X: SPDIF Mode set to 9900
RegisterIntrHandler: intr INT_RTC4, handler 8500
microVU1: Cached Prog = [000] [PC=0000] [List=01] (Cache=0.000%) [0.0mb]
microVU1: Cached Prog = [001] [PC=01c0] [List=01] (Cache=0.000%) [0.0mb]
microVU1: Cached Prog = [002] [PC=01e8] [List=01] (Cache=0.000%) [0.0mb]
microVU1: Cached Prog = [003] [PC=0210] [List=01] (Cache=0.000%) [0.0mb]
microVU1: Cached Prog = [004] [PC=0238] [List=01] (Cache=0.000%) [0.0mb]
microVU1: Cached Prog = [005] [PC=02a0] [List=01] (Cache=0.018%) [0.0mb]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: Cached Prog = [006] [PC=23e0] [List=01] (Cache=0.333%) [0.2mb]
microVU1: Cached Prog = [007] [PC=0670] [List=01] (Cache=0.336%) [0.2mb]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
Possible old value used in COP2 code
2ce124 D8680000 lqc2 vf08, 0x 0(v1)
2ce128 D8690010 lqc2 vf09, 0x 10(v1)
2ce12c D86A0020 lqc2 vf10, 0x 20(v1)
2ce130 D86B0030 lqc2 vf11, 0x 30(v1)
2ce134 70007008 paddw t6, zero, zero
2ce138 3C0E3F80 lui t6, 0x3F80
2ce13c 700E77C9 prot3w t6, t6
2ce140 70006808 paddw t5, zero, zero
2ce144 71C064C8 ppacw t4, t6, zero
2ce148 DE2B0010 ld t3, 0x 10(s1)
2ce14c 9662000A lhu v0, 0x A(s3)
2ce150 96630008 lhu v1, 0x 8(s3)
2ce154 0002117C dsll32 v0,v0, 0x05
2ce158 00431025 or v0,v0, v1
2ce15c 0162582C dadd t3, t3, v0
2ce160 340A8000 ori t2,zero, 0x8000
2ce164 84A20000 lh v0, 0x 0(a1)
2ce168 84A30002 lh v1, 0x 2(a1)
2ce16c 70621488 pextlw v0, v1, v0
2ce170 0040602D daddu t4, v0, zero
2ce174 48ACA000 qmtc2 t4, vf20
2ce178 4B94A13D vitof4.xy vf20, vf20
2ce17c 48ACC000 qmtc2 t4, vf24
2ce180 4B98C13D vitof4.xy vf24, vf24
2ce184 4BF4E1BC vmulax.xyzw ACC,vf28,vf20x
2ce188 4BF4E8BD vmadday.xyzw ACC,vf29,vf20y
2ce18c 4BF4F0BE vmaddaz.xyzw ACC,vf30,vf20z
2ce190 *4BF4FD0B vmaddw.xyzw vf20, vf31, vf20w
2ce194 4BF403BC vdiv Q, vf00w, vf20w
2ce198 =48428800 cfc2 v0, MACflag
2ce19c 30420011 andi v0,v0, 0x0011
2ce1a0 144000AD bne v0, zero, ->$0x002CE458
2ce1a4 4BF841BC vmulax.xyzw ACC,vf08,vf24x
microVU1: Cached Prog = [008] [PC=0358] [List=01] (Cache=0.653%) [0.4mb]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
Possible old value used in COP2 code
2ce164 84A20000 lh v0, 0x 0(a1)
2ce168 84A30002 lh v1, 0x 2(a1)
2ce16c 70621488 pextlw v0, v1, v0
2ce170 0040602D daddu t4, v0, zero
2ce174 48ACA000 qmtc2 t4, vf20
2ce178 4B94A13D vitof4.xy vf20, vf20
2ce17c 48ACC000 qmtc2 t4, vf24
2ce180 4B98C13D vitof4.xy vf24, vf24
2ce184 4BF4E1BC vmulax.xyzw ACC,vf28,vf20x
2ce188 4BF4E8BD vmadday.xyzw ACC,vf29,vf20y
2ce18c 4BF4F0BE vmaddaz.xyzw ACC,vf30,vf20z
2ce190 *4BF4FD0B vmaddw.xyzw vf20, vf31, vf20w
2ce194 4BF403BC vdiv Q, vf00w, vf20w
2ce198 =48428800 cfc2 v0, MACflag
2ce19c 30420011 andi v0,v0, 0x0011
2ce1a0 144000AD bne v0, zero, ->$0x002CE458
2ce1a4 4BF841BC vmulax.xyzw ACC,vf08,vf24x
Reverb Parameter Update for Core 0:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0xffff8000, 0xffff8000
APF1_SIZE, APF2_SIZE 0x00000694, 0x000004e4
APF1_VOL, APF2_VOL 0x00006000, 0x00005c00
COMB1_VOL 0x00005000
COMB2_VOL 0x00004c00
COMB3_VOL 0xffffb800
COMB4_VOL 0xffffbc00
COMB1_L_SRC, COMB1_R_SRC 0x00005308, 0x000042f4
COMB2_L_SRC, COMB2_R_SRC 0x000046f0, 0x00003704
COMB3_L_SRC, COMB3_R_SRC 0x00002f10, 0x00001f04
COMB4_L_SRC, COMB4_R_SRC 0x00002800, 0x00001b34
SAME_L_SRC, SAME_R_SRC 0x00004700, 0x0000370c
DIFF_L_SRC, DIFF_R_SRC 0x00002708, 0x00001704
SAME_L_DST, SAME_R_DST 0x000056e8, 0x000046ec
DIFF_L_DST, DIFF_R_DST 0x00003700, 0x00002704
IIR_VOL, WALL_VOL 0x00006000, 0xffffc000
APF1_L_DST 0x00001700
APF1_R_DST 0x00001068
APF2_L_DST 0x000009d0
APF2_R_DST 0x000004e8
EffectsBufferSize 0x56f0
----------------------------------------------------------
Reverb Parameter Update for Core 1:
----------------------------------------------------------
IN_COEF_L, IN_COEF_R 0xffff8000, 0xffff8000
APF1_SIZE, APF2_SIZE 0x00000694, 0x000004e4
APF1_VOL, APF2_VOL 0x00006000, 0x00005c00
COMB1_VOL 0x00005000
COMB2_VOL 0x00004c00
COMB3_VOL 0xffffb800
COMB4_VOL 0xffffbc00
COMB1_L_SRC, COMB1_R_SRC 0x00005308, 0x000042f4
COMB2_L_SRC, COMB2_R_SRC 0x000046f0, 0x00003704
COMB3_L_SRC, COMB3_R_SRC 0x00002f10, 0x00001f04
COMB4_L_SRC, COMB4_R_SRC 0x00002800, 0x00001b34
SAME_L_SRC, SAME_R_SRC 0x00004700, 0x0000370c
DIFF_L_SRC, DIFF_R_SRC 0x00001704, 0x00002708
SAME_L_DST, SAME_R_DST 0x000056e8, 0x000046ec
DIFF_L_DST, DIFF_R_DST 0x00003700, 0x00002704
IIR_VOL, WALL_VOL 0x00006000, 0xffffc000
APF1_L_DST 0x00001700
APF1_R_DST 0x00001068
APF2_L_DST 0x000009d0
APF2_R_DST 0x000004e8
EffectsBufferSize 0x56f0
----------------------------------------------------------
microVU1: Cached Prog = [009] [PC=2630] [List=01] (Cache=0.942%) [0.6mb]
microVU1: Cached Prog = [010] [PC=2648] [List=01] (Cache=0.942%) [0.6mb]
microVU1: Cached Prog = [011] [PC=2670] [List=01] (Cache=0.942%) [0.6mb]
microVU1: Cached Prog = [012] [PC=2040] [List=01] (Cache=0.942%) [0.6mb]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: Cached Prog = [013] [PC=26a0] [List=01] (Cache=0.942%) [0.6mb]
microVU1: Cached Prog = [014] [PC=2410] [List=01] (Cache=0.942%) [0.6mb]
microVU1: Cached Prog = [015] [PC=2428] [List=01] (Cache=0.942%) [0.6mb]
microVU1: Cached Prog = [016] [PC=2450] [List=01] (Cache=0.942%) [0.6mb]
microVU1: Cached Prog = [017] [PC=24a0] [List=01] (Cache=0.942%) [0.6mb]
microVU1: Cached Prog = [018] [PC=24b0] [List=01] (Cache=0.942%) [0.6mb]
microVU1: Cached Prog = [019] [PC=24e0] [List=01] (Cache=0.942%) [0.6mb]
microVU1: Cached Prog = [020] [PC=2080] [List=01] (Cache=0.942%) [0.6mb]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: Cached Prog = [021] [PC=2480] [List=01] (Cache=0.942%) [0.6mb]
microVU1: Cached Prog = [022] [PC=20c0] [List=01] (Cache=0.942%) [0.6mb]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: Cached Prog = [023] [PC=2520] [List=01] (Cache=0.942%) [0.6mb]
microVU1: Cached Prog = [024] [PC=2538] [List=01] (Cache=0.942%) [0.6mb]
microVU1: Cached Prog = [025] [PC=2560] [List=01] (Cache=0.942%) [0.6mb]
microVU1: Cached Prog = [026] [PC=2590] [List=01] (Cache=0.942%) [0.6mb]
microVU1: Cached Prog = [027] [PC=2100] [List=01] (Cache=0.942%) [0.6mb]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: Cached Prog = [028] [PC=2140] [List=01] (Cache=0.942%) [0.6mb]
microVU1: 2 cycle stall on branch instruction [22d8]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 1 cycle stall on branch instruction [2340]
microVU1: 2 cycle stall on branch instruction [22d8]
microVU1: 2 cycle stall on branch instruction [22d8]
microVU1: 2 cycle stall on branch instruction [22d8]
microVU1: Cached Prog = [029] [PC=26c0] [List=01] (Cache=0.942%) [0.6mb]
microVU1: Cached Prog = [030] [PC=26d0] [List=01] (Cache=0.942%) [0.6mb]
microVU1: Cached Prog = [031] [PC=2700] [List=01] (Cache=0.942%) [0.6mb]
microVU1: Cached Prog = [032] [PC=0010] [List=01] (Cache=1.378%) [0.8mb]
microVU1: Cached Prog = [033] [PC=0000] [List=02] (Cache=1.380%) [0.8mb]
microVU1: Cached Prog = [034] [PC=0020] [List=01] (Cache=1.381%) [0.8mb]
microVU1: Cached Prog = [035] [PC=0160] [List=01] (Cache=1.383%) [0.8mb]
microVU1: Cached Prog = [036] [PC=0188] [List=01] (Cache=1.383%) [0.8mb]
microVU1: 1 cycle stall on branch instruction [0700]
microVU1: 3 cycle stall on branch instruction [07a0]
microVU1: 1 cycle stall on branch instruction [0700]
microVU1: 2 cycle stall on branch instruction [0808]
microVU1: 1 cycle stall on branch instruction [0700]
microVU1: 1 cycle stall on branch instruction [0700]
microVU1: 3 cycle stall on branch instruction [07a0]
microVU1: 2 cycle stall on branch instruction [0808]
microVU1: 1 cycle stall on branch instruction [0700]
microVU1: Cached Prog = [037] [PC=01a0] [List=01] (Cache=1.383%) [0.8mb]
microVU1: Cached Prog = [038] [PC=01b0] [List=01] (Cache=1.430%) [0.9mb]
microVU1: Cached Prog = [039] [PC=01d8] [List=01] (Cache=1.430%) [0.9mb]
microVU1: 1 cycle stall on branch instruction [0700]
microVU1: 3 cycle stall on branch instruction [07a0]
microVU1: 1 cycle stall on branch instruction [0700]
microVU1: 2 cycle stall on branch instruction [0808]
microVU1: 1 cycle stall on branch instruction [0700]
microVU1: 1 cycle stall on branch instruction [0700]
microVU1: 3 cycle stall on branch instruction [07a0]
microVU1: 2 cycle stall on branch instruction [0808]
microVU1: 1 cycle stall on branch instruction [0700]
microVU1: Cached Prog = [040] [PC=01e8] [List=02] (Cache=1.430%) [0.9mb]
microVU1: Cached Prog = [041] [PC=0030] [List=01] (Cache=1.479%) [0.9mb]
microVU1: Cached Prog = [042] [PC=0040] [List=01] (Cache=1.484%) [0.9mb]
microVU1: Cached Prog = [043] [PC=0510] [List=01] (Cache=1.486%) [0.9mb]
microVU1: Cached Prog = [044] [PC=0538] [List=01] (Cache=1.486%) [0.9mb]
microVU1: 1 cycle stall on branch instruction [0700]
microVU1: 3 cycle stall on branch instruction [07a0]
microVU1: 1 cycle stall on branch instruction [0700]
microVU1: 2 cycle stall on branch instruction [0808]
microVU1: 1 cycle stall on branch instruction [0700]
microVU1: 1 cycle stall on branch instruction [0700]
microVU1: 3 cycle stall on branch instruction [07a0]
microVU1: 2 cycle stall on branch instruction [0808]
microVU1: 1 cycle stall on branch instruction [0700]
Possible old value used in COP2 code
microVU1: Cached Prog = [045] [PC=0550] [List=01] (Cache=1.486%) [0.9mb]
2ce1a8 4BF848BD vmadday.xyzw ACC,vf09,vf24y
2ce1ac 4BF850BE vmaddaz.xyzw ACC,vf10,vf24z
2ce1b0 4BF85E0B vmaddw.xyzw vf24, vf11, vf24w
2ce1b4 4A0003BF vwaitq
2ce1b8 4BC0A51C vmulq.xyz vf20,vf20,Q
2ce1bc 4BF803BC vdiv Q, vf00w, vf24w
microVU1: Cached Prog = [046] [PC=0578] [List=01] (Cache=1.486%) [0.9mb]
2ce1c0 84A20004 lh v0, 0x 4(a1)
2ce1c4 84A30006 lh v1, 0x 6(a1)
2ce1c8 70621488 pextlw v0, v1, v0
2ce1cc 0040602D daddu t4, v0, zero
2ce1d0 48ACA800 qmtc2 t4, vf21
2ce1d4 4B95A93D vitof4.xy vf21, vf21
2ce1d8 48ACC800 qmtc2 t4, vf25
2ce1dc 4B99C93D vitof4.xy vf25, vf25
2ce1e0 4A0003BF vwaitq
2ce1e4 4A40C51C vmulq.z vf20,vf24,Q
2ce1e8 4BF5E1BC vmulax.xyzw ACC,vf28,vf21x
2ce1ec 4BF5E8BD vmadday.xyzw ACC,vf29,vf21y
2ce1f0 4BF5F0BE vmaddaz.xyzw ACC,vf30,vf21z
2ce1f4 *4BF5FD4B vmaddw.xyzw vf21, vf31, vf21w
2ce1f8 4BF503BC vdiv Q, vf00w, vf21w
2ce1fc =48428800 cfc2 v0, MACflag
2ce200 30420011 andi v0,v0, 0x0011
2ce204 14400094 bne v0, zero, ->$0x002CE458
2ce208 4BF941BC vmulax.xyzw ACC,vf08,vf25x
Possible old value used in COP2 code
2ce20c 4BF948BD vmadday.xyzw ACC,vf09,vf25y
microVU1: Cached Prog = [047] [PC=05a0] [List=01] (Cache=1.486%) [0.9mb]
2ce210 4BF950BE vmaddaz.xyzw ACC,vf10,vf25z
2ce214 4BF95E4B vmaddw.xyzw vf25, vf11, vf25w
2ce218 4A0003BF vwaitq
2ce21c 4BC0AD5C vmulq.xyz vf21,vf21,Q
2ce220 4BF903BC vdiv Q, vf00w, vf25w
2ce224 84A20008 lh v0, 0x 8(a1)
2ce228 84A3000A lh v1, 0x A(a1)
2ce22c 70621488 pextlw v0, v1, v0
2ce230 0040602D daddu t4, v0, zero
2ce234 48ACB000 qmtc2 t4, vf22
2ce238 4B96B13D vitof4.xy vf22, vf22
2ce23c 48ACD000 qmtc2 t4, vf26
2ce240 4B9AD13D vitof4.xy vf26, vf26
2ce244 4A0003BF vwaitq
2ce248 4A40CD5C vmulq.z vf21,vf25,Q
2ce24c 4BF6E1BC vmulax.xyzw ACC,vf28,vf22x
2ce250 4BF6E8BD vmadday.xyzw ACC,vf29,vf22y
2ce254 4BF6F0BE vmaddaz.xyzw ACC,vf30,vf22z
2ce258 *4BF6FD8B vmaddw.xyzw vf22, vf31, vf22w
2ce25c 4BF603BC vdiv Q, vf00w, vf22w
2ce260 =48428800 cfc2 v0, MACflag
2ce264 30420011 andi v0,v0, 0x0011
2ce268 1440007B bne v0, zero, ->$0x002CE458
2ce26c 4BFA41BC vmulax.xyzw ACC,vf08,vf26x
Gif Path[1] - MTGS Wait! [r=0x7ffb10]
Gif Path[1] - MTGS Wait! [r=0x7f9f30]
Gif Path[1] - MTGS Wait! [r=0x7ff480]
Gif Path[1] - MTGS Wait! [r=0x7fc240]
Gif Path[1] - MTGS Wait! [r=0x7ff300]
Gif Path[1] - MTGS Wait! [r=0x7e9460]
Gif Path[1] - MTGS Wait! [r=0x7ff630]
Gif Path[1] - MTGS Wait! [r=0x7fc1b0]
Gif Path[1] - MTGS Wait! [r=0x7ff5d0]
Gif Path[1] - MTGS Wait! [r=0x7f9450]
Gif Path[1] - MTGS Wait! [r=0x7ff210]
Gif Path[1] - MTGS Wait! [r=0x7f3b40]
Gif Path[1] - MTGS Wait! [r=0x7ff990]
Gif Path[1] - MTGS Wait! [r=0x7f4770]
Gif Path[1] - MTGS Wait! [r=0x7ff630]
Gif Path[1] - MTGS Wait! [r=0x7fa950]
Gif Path[1] - MTGS Wait! [r=0x7ffa80]
Gif Path[1] - MTGS Wait! [r=0x7f0420]
Gif Path[1] - MTGS Wait! [r=0x7ff570]
Gif Path[1] - MTGS Wait! [r=0x7f7f20]
Gif Path[1] - MTGS Wait! [r=0x7ff7b0]
Gif Path[1] - MTGS Wait! [r=0x7f8490]
Gif Path[1] - MTGS Wait! [r=0x7ff8d0]
Gif Path[1] - MTGS Wait! [r=0x7dafd0]
Gif Path[1] - MTGS Wait! [r=0x7ff840]
Gif Path[1] - MTGS Wait! [r=0x7f5640]
microVU1: Cached Prog = [048] [PC=0050] [List=01] (Cache=1.563%) [1.0mb]
Closing plugins...
Closing DEV9
Closing FW
Closing Dev9null.
Closing USB
Closing CDVD
Closing USBnull.
Closing SPU2
OnePad 2 is configured to use the keyboard by default, so it makes sense that there is no error situation for it.
As a background note, that the current state of pcsx2 seems to be a bit buggy - press ESC and everything hangs, and sound cut out fairly early into the FFX intro - this is simple stuff that has worked well for a long time.
It feels like you didn't have the latest onepad. Or 0 gamepad are detected by SDL2. The only GUI difference is the new list box on the gamepad configuration
dialog.
Edit: I will test the behavior when no pad are detected.
Presumably SDL2 isn't detecting any gamepads. But without me turning this into a programming project (and then waiting at least a week), thats all I can say.
Could you give me a screenshot of the gamepad configuration. Just to be sure.
Sigh... see this 'unable to find udev' library error? When I saw that the first time round I checked it out with ldd and it was fine. Of course I did that check in the chroot... and I'm now running this outside... libudev1:i386 wasn't installed in the host environment. I ignored it since I'm not using any CD plugin, but of course that was the answer.
Sorry for the wasted time.
Right, so actually testing this, OnePad is happy the pad exists since I can get it to rumble, but I can't configure any buttons (Set All Buttons doesn't respond to anything). Its probably worth just waiting until I can throw some real time at this, probably with that SDL2 test program again to see if I can recreate that SDL_GAMECONTROLLERCONFIG string. For what its worth, antimicro continues to do its job but then it probably doesn't use SDL2.
Yes. The GUI is basically useless for gamecontroller. Everything is based on SDL2 mapping.
Right, I've reached this again - I've reran the controllermap program:
03000000100800000100000010010000,Twin USB Joystick,platform:Linux,x:b3,a:b2,b:b1,y:b0,back:b8,start:b9,dpleft:h0.8,dpdown:h0.4,dpright:h0.2,dpup:h0.1,leftshoulder:b6,lefttrigger:b4,rightshoulder:b7,righttrigger:b5,leftstick:b10,rightstick:b11,leftx:a0,lefty:a1,rightx:a3,righty:a2,
I don't actually need this though to use the pad it seems... is there anything I should test?
@OmegaPhil what's the status, do you still experience the issue ?
I don't actually have an appropriate chroot to build pcsx2 with atm, so I can no longer test. My last message looks good (I was at least able to get the controller to work, but the GUI isn't useful as gregory said).
Alright, will be closing this since the main issue is resolved.
Debian Testing machine, Linux 4.3.0-1-amd64 #1 SMP Debian 4.3.5-1 (2016-02-06) x86_64 GNU/Linux
Its been about half a year since I played with the latest git, I have updated (0ef8ddb2a2f68dd9815834a250a89d71d7b22bd4) and suddenly OnePad says that no joypads are recognised (I'm using a 'Personal Communication Systems, Inc. Dual PSX Adaptor' USB dongle). This pad is detected and works fine with ppsspp, and normally I use it to send X key events through antimicro without issue.
Checking out the v1.4.0 tag has similar problems, even though its using an earlier version of the OnePad library. Broken with an upgrade in dependencies perhaps?
I've noted what you said in the hotplug feature request issue - in this case the pad is connected and working before pcsx2 is started.
pcsx2 seems pretty happy starting up (ran from its 32bit chroot):