Closed mheyer32 closed 3 years ago
Hi There,
Are you seeing activity on the /AS output of the CPLD? Do you have Flash Chips programmed? The default boot device is Flash so if they are not programmed, please boot using internal Kickstart.
I'll check the /AS activity tonight. I checked for unsoldered/bridged contacts multiple times, even replaced the CPLD with a spare one. The flash chips are not programmed yet. I tried switching to the original kickstart by holding Ctrl+Amiga+Amiga for several seconds, but to no avail.
Could you also share some pictures? In addition to that are you using an accelerator board or just the CPU?
Im planning to use it with a TF536, but for now I’ll just test with the basic 68k
/AS is high on both, CPU and MB. The CPU signal is at ca 4V, while the MB signal is at ca 3.3V Weirdly, the CLK signal is only ca 3V from peak to peak.
To me, on the second photo it looks like a short on the top left side of the CPLD. Have you done a continuity test between all neighbouring pins?
/AS_MB should be 3.3 volts as it is a CPLD output signal. 4V from the CPU seems a bit low. Is VCC_CPU @ 5 volts?
VCC_CPU is stable +5V
There are no bridges. There was a bit of flux left that made it look like a bridge. Sorry for the poor picture, it was taken using a looking glass and a phone :-)
Just to be sure, have you buzzed out with a continuity test all pins are connected? Do you have a logic analyser or scope? Would help to see the /AS, /LDS, /UDS and /DTACK signals. Are you sure after each cold boot, you are holding down CTRL-A-A?
I buzzed out the lines leading into the CPLD and they all seem fine. I got a scope and a logic tester, but no logic analyser.
/AS, /LDS, /UDS and /DTACK signals are all high... with the exception of the CLK signal there's no activity on any of the CPU pins :-(
Strange. If the /HALT is asserted (low) it is a good indication that the CPU hasn’t been able to read valid data from the bus. Is /BERR also low?
Do you have diagROM?
Any luck? Is it now working?
Sorry, I haven't had the time to work on it recently. I'll let you know once I have more info.
I eventually got it to work tonight. What was ultimately the culprit were tiny soldering bridges on 2-3 flash rom and CPU connector pins. While soldering I might have scratched the neighboring silkscreen by the tiniest bit, uncovering the GND plane and creating a bridge. I was only able to see these under the microscope.
Maybe a future iteration of the board could increase the distance of the empty space between the pins and GND?
Thanks for creating the board!!! ...off to testing :-D
Wow, thanks for pointing this out @mheyer32 . Judging from the soldermask color, I bought my PCB from the same seller as you and just removed about 8 or so of those unexpected bridges. My board is now working as well.
I built the board, programmed the CPLD successfully, but I get no response from the system when turning on the machine. Probing the address lines and data lines it looks like there's no activity at all. The HALT line is low. I can see that the clock signal reaches the CPLD. Do you have any tips on how to debug this? I am using a Rev8a board with a Kickstart 3.1.4 ROM