search

PR77 / A500_ACCEL_RAM_IDE-Rev-2

Improved design attempt for Amiga 500 in socket 68000 Accelerator, FastRAM and IDE Interface
GNU General Public License v3.0
50 stars 5 forks source link

Looking for information #9

Closed jdwininger closed 2 months ago

jdwininger commented 3 months ago

Hey there, I recently came into possession of a V2 board. I've been looking to play around with it but there isn't a lot of data about it online. I was looking to find information on changing the clock speed and information about the IDE controller, in particular what ROM version is needed to support it. I've been googling for a couple of days and not turned up any useful information.

thanks.

PR77 commented 3 months ago

Hey, yes I agree these details are a bit limited. I used Remus to create a custom image based on Kick 3.1 and 2.58 (I think) of the IDE driver. In the next days I’ll create a MD document with the details.

PR77 commented 3 months ago

BTW, changing the clock speed is as simple as changing the value of the XTAL oscillator. Mine does not stay stable past 40Mhz due to both the CPU and RAM timings (with 0 wait states). I find 40Mhz enough and it satisfies my childhood dream of building my own accelerator for the A500. 😉

If you understand Verilog, then I suggest having a look in there to get a better idea.

PR77 commented 2 months ago

Hey there, I created a simple guide to create a custom kickstart, have a look at the KICKSTART.md in the repo root.

Good luck - reach out if you need help!

jdwininger commented 2 months ago

Thank you for all the information. I didn’t expect so much. Thank you again.