j721e: wkup_gpio gpio0_0 thru gpio0_16

[RobertCNelson]

Hey @PVC-Pipe , was looking at:

# wkup_gpio0
<&wkup_pmx0 0 44 60>,
<&wkup_pmx0 60 60 8>;

and how gpio0_0 -> gpio0_16 is bit-shifted into the mid of hte wkup_gpio0 range..

My script using sysconfig's json file is calcualting:

<&wkup_pmx_range 44 16 PIN_GPIO_RANGE_IOPAD>,
<&wkup_pmx_range 0 44 PIN_GPIO_RANGE_IOPAD>,
<&wkup_pmx_range 60 24 PIN_GPIO_RANGE_IOPAD>,

<&wkup_pmx0 0 44 16>,
<&wkup_pmx0 16 0 44>,
<&wkup_pmx0 60 60 24>,

Does this seem correct to you..

So GPIO0_0 -> GPIO0_15 is at:

44, 1, 0xB0, WKUP_GPIO0_0
45, 2, 0xB4, WKUP_GPIO0_1
46, 3, 0xB8, WKUP_GPIO0_2
47, 4, 0xBC, WKUP_GPIO0_3
48, 5, 0xC0, WKUP_GPIO0_4
49, 6, 0xC4, WKUP_GPIO0_5
50, 7, 0xC8, WKUP_GPIO0_6
51, 8, 0xCC, WKUP_GPIO0_7
52, 9, 0xD0, WKUP_GPIO0_8
53, 10, 0xD4, WKUP_GPIO0_9
54, 11, 0xD8, WKUP_GPIO0_10
55, 12, 0xDC, WKUP_GPIO0_11
56, 13, 0xE0, WKUP_GPIO0_12
57, 14, 0xE4, WKUP_GPIO0_13
58, 15, 0xE8, WKUP_GPIO0_14
59, 16, 0xEC, WKUP_GPIO0_15

so: <&wkup_pmx0 0 44 16>,

Then GPIO0_16 -> GPIO0_59 is at:

0, 1, 0x0, WKUP_GPIO0_16
1, 2, 0x4, WKUP_GPIO0_17
2, 3, 0x8, WKUP_GPIO0_18
3, 4, 0xC, WKUP_GPIO0_19
4, 5, 0x10, WKUP_GPIO0_20
5, 6, 0x14, WKUP_GPIO0_21
6, 7, 0x18, WKUP_GPIO0_22
7, 8, 0x1C, WKUP_GPIO0_23
8, 9, 0x20, WKUP_GPIO0_24
9, 10, 0x24, WKUP_GPIO0_25
10, 11, 0x28, WKUP_GPIO0_26
11, 12, 0x2C, WKUP_GPIO0_27
12, 13, 0x30, WKUP_GPIO0_28
13, 14, 0x34, WKUP_GPIO0_29
14, 15, 0x38, WKUP_GPIO0_30
15, 16, 0x3C, WKUP_GPIO0_31
16, 17, 0x40, WKUP_GPIO0_32
17, 18, 0x44, WKUP_GPIO0_33
18, 19, 0x48, WKUP_GPIO0_34
19, 20, 0x4C, WKUP_GPIO0_35
20, 21, 0x50, WKUP_GPIO0_36
21, 22, 0x54, WKUP_GPIO0_37
22, 23, 0x58, WKUP_GPIO0_38
23, 24, 0x5C, WKUP_GPIO0_39
24, 25, 0x60, WKUP_GPIO0_40
25, 26, 0x64, WKUP_GPIO0_41
26, 27, 0x68, WKUP_GPIO0_42
27, 28, 0x6C, WKUP_GPIO0_43
28, 29, 0x70, WKUP_GPIO0_44
29, 30, 0x74, WKUP_GPIO0_45
30, 31, 0x78, WKUP_GPIO0_46
31, 32, 0x7C, WKUP_GPIO0_47
32, 33, 0x80, WKUP_GPIO0_48
33, 34, 0x84, WKUP_GPIO0_49
34, 35, 0x88, WKUP_GPIO0_50
35, 36, 0x8C, WKUP_GPIO0_51
36, 37, 0x90, WKUP_GPIO0_52
37, 38, 0x94, WKUP_GPIO0_53
38, 39, 0x98, WKUP_GPIO0_54
39, 40, 0x9C, WKUP_GPIO0_55
40, 41, 0xA0, WKUP_GPIO0_56
41, 42, 0xA4, WKUP_GPIO0_57
42, 43, 0xA8, WKUP_GPIO0_58
43, 44, 0xAC, WKUP_GPIO0_59

so <&wkup_pmx0 16 0 44>,

Then finally, GPIO0_60 -> GPIO0_83

60, 1, 0xF0, WKUP_GPIO0_60
61, 2, 0xF4, WKUP_GPIO0_61
62, 3, 0xF8, WKUP_GPIO0_62
63, 4, 0xFC, WKUP_GPIO0_63
64, 5, 0x100, WKUP_GPIO0_64
65, 6, 0x104, WKUP_GPIO0_65
66, 7, 0x108, WKUP_GPIO0_66
67, 8, 0x10C, WKUP_GPIO0_67
76, 9, 0x130, WKUP_GPIO0_68
77, 10, 0x134, WKUP_GPIO0_69
78, 11, 0x138, WKUP_GPIO0_70
79, 12, 0x13C, WKUP_GPIO0_71
80, 13, 0x140, WKUP_GPIO0_72
81, 14, 0x144, WKUP_GPIO0_73
82, 15, 0x148, WKUP_GPIO0_74
83, 16, 0x14C, WKUP_GPIO0_75
84, 17, 0x150, WKUP_GPIO0_76
85, 18, 0x154, WKUP_GPIO0_77
86, 19, 0x158, WKUP_GPIO0_78
87, 20, 0x15C, WKUP_GPIO0_79
88, 21, 0x160, WKUP_GPIO0_80
89, 22, 0x164, WKUP_GPIO0_81
90, 23, 0x168, WKUP_GPIO0_82
91, 24, 0x16C, WKUP_GPIO0_83

and <&wkup_pmx0 60 60 24>,

Regards,

[PVC-Pipe]

Hi @RobertCNelson, you're correct. I edited my script so that it could catch the WKUP_GPIO0_15 to WKUP_GPIO0_16 jump (commit 4f5b85e).

However, the issue of missing WKUP_GPIO0_68 and higher, is a strange one. The TDA4VM datasheet states: the "MUXMODE field is not used to select the multiplexed signal function for [these pins]," in the footnote of Table 5-1. Pin Attributes.

It also says to look at the "ADC Integration Details section in [the] Device Configuration chapter of the device TRM" for more details, but I couldn't find that section within the DRA829/TDA4VM TRM.

Since the WKUP_GPIO0_68 to WKUP_GPIO0_83 don't have padconfigs, I don't think they should be included in the range.

Let me know what you think.

[RobertCNelson]

Yeah, 69 to 83 we should make a hole for.. There's also a few that are "O" only, i just copied the register range from the datasheet and went to town.