PandABlocks / PandABlocks-FPGA

VHDL functional blocks with their simulations and test sequences
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'make single_hdl_test' showed 'test passed' even when error occurs #84

Closed shu-soleil closed 2 years ago

shu-soleil commented 2 years ago

Running 'make TEST="pcap 3" single_hdl_test' on the commit 2dc5f16, the test result shows:

The test result is pcap_3_tb ##################################### pcap_3_tb has passed ##################################### INFO: [Simtcl 6-16] Simulation closed

But actually a Fatal error occured

FATAL_ERROR: Vivado Simulator kernel has discovered an exceptional condition from which it cannot recover. Process will terminate. For technical support on this issue, please open a WebCase with this project attached at http://www.xilinx.com/support. Time: 156 ns Iteration: 1

coretl commented 2 years ago

@EmilioPeJu have you seen this before?

EmilioPeJu commented 2 years ago

Have I seen Vivado crashing? yes, a few times, but unfortunate the logs don't show enough information to know the underlying condition... I stopped the simulation at time 155 ns and stepped line by line until crashing, it breaks somewhere in pcap_buffer.vhd inside process ps_mode_bus while trying to set pcap_dat_o using the record mode_ts_bits, my guess is that Vivado simulator is not handling records correctly under some unknown conditions... I've seen Michael having lots of problems with records in the past.

shu-soleil commented 2 years ago

I've corrected the crash on the branch fixPCAPSimError, this issue is linked to PR #85 to add crash report on the testbench result.