Feature request: SPI

[gergoerdi]

Probably could be similar to existing UART support.

[Patryk27]

Yes, it should be relatively straightforward to implement; I see you've prepared some commit which looks pretty neat - would you like to create a pull request with it? 🙂

[gergoerdi]

I see you've prepared some commit which looks pretty neat - would you like to create a pull request with it?

Unfortunately, my branch doesn't work yet...

[Patryk27]

Sure, in this case I'll try to come up with something over the week - I'll ping you on the pull request, if you'd like to try the code once it's ready 🙂

[Patryk27]

Unfortunately, my branch doesn't work yet...

You were pretty close, though!

In simavr, SPIs are ordered with numbers, not characters, so while UART is identified with '0' or '1', SPIs are identified with 0 or 1, i.e.:

#[derive(Clone, Copy, Debug, PartialEq, Eq)]
pub enum IoCtl {
    /* ... */
    SpiGetIrq { spi: u8 }, // note the u8 here
    /* ... */
}

impl IoCtl {
    pub fn into_ffi(self) -> u32 {
        let ctl = match self {
            /* ... */
            IoCtl::SpiGetIrq { spi } => [b's', b'p', b'i', spi],
            /* ... */
        };

        /* ... */
    }
}

(you can observe this in simavr's code by comparing how AVR_IOCTL_SPI_GETIRQ and AVR_IOCTL_UART_GETIRQ are used.)

Seizing the day I want to refactor a few things, but it looks like the feature is mostly working this way 🙂

[gergoerdi]

You were pretty close, though!

In simavr, SPIs are ordered with numbers, not characters, so while UART is identified with '0' or '1', SPIs are identified with 0 or 1

Ah, I would have never in a million years...

Thanks for looking into this.

[gergoerdi]

Can you add an example component that responds to SPI MOSI with some MISO reply depending on the value of some other (chip select-like) pins?

[Patryk27]

Sure, I'll come up with something 🙂