Open crushers opened 10 years ago
For this I need the output of ssdtPRGen.sh, everything below this line: "Bugs > https://github.com/Piker-Alpha/ssdtPRGen.sh/issues <"
Sorry.I no see this post.
Run ssdtPRGen.sh and copy the output, the so called lot, everything below the line above into your comment here.
After work I post my output this.l'll use the command ~/ssdtPRGen.sh -d 2!!!!This is Ok? Pike this is your email:notifications@github.com?
You should run ssdtPRGen.sh with the argument you used to generate your SSDT that you are having issues with.
And no. That is not my e-mail address. You can find the correct one in ssdtPRGen.sh
Ok I use a command -w 2 and kernel flags -xcpm.After delete boot flags I have a five P-State.Put the -xcpm I have a 7 P-State but every time same error: PM kernel[0]: IOPPF: XCPM mode PM kernel[0]: XCPM: P-state table mismatch (error:0x11) PM kernel[0]: X86PlatformShim::sendPStates - pmCPUControl (XCPMIO_SETPSTATETABLE) returned 0x11 PM kernel[0]: X86PlatformShim::start - Failed to send PStates PM kernel[0]: X86PlatformShim::start - Failed to send stepper I do not have mean values....
In that case try -w 1 and -w 3 (with the -xcpm kernel flag in place)
In same time or first ~/ssdtPRGen.sh -w 1 and test after ~/ssdtPRGen.sh -w 3 and test.Or ~/ssdtPRGen.sh -w 1 -w 3?How let me use the commands.I tested after my work,Then I ask is why all this.:)
@Piker-Alpha I now see this command. Store ("gIvyWorkAround : 3", Debug) But I'dont have this.Whether we needed this command?
After firsr test ~/ssdtPRGen.sh -w 3
I have this:
And this P-State
After second test ~/ssdtPRGen.sh -w 1
I have a this:
And this P-State
I change my SMBIOS to iMac13,1 and use ~/ssdtPRGen.sh -w 2 again same error kernel[0]: IOPPF: XCPM mode kernel[0]: XCPM: P-state table mismatch (error:0x11) kernel[0]: X86PlatformShim::sendPStates - pmCPUControl (XCPMIO_SETPSTATETABLE) returned 0x11 kernel[0]: X86PlatformShim::start - Failed to send PStates kernel[0]: X86PlatformShim::start - Failed to send stepper I send you my SSDT on email.You look and tell me.
-w 2 didn't work. Gave you the errors, so using it is pointless in my view. I need to know if the error is gone with -w 1 or -w 3.
Yes.On -w 1 and -w 3 change errors.After this command I sent you my boot log errors and my ssdt_pr.dsl.
Changed? Not gone?
After test -w 1 P-State 16,25,30,35,37,38,39 error -w 1 kernel[0]: IOPPF: XCPM mode kernel[0]: XCPM: P-state table mismatch (error:0x11) kernel[0]: X86PlatformShim::sendPStates - pmCPUControl (XCPMIO_SETPSTATETABLE) returned 0x11 kernel[0]: X86PlatformShim::start - Failed to send PStates kernel[0]: X86PlatformShim::start - Failed to send stepper /*
DefinitionBlock ("ssdt.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00013400) { External (PR.CPU0, DeviceObj) External (PR.CPU1, DeviceObj) External (PR.CPU2, DeviceObj) External (PR.CPU3, DeviceObj) External (PR.CPU4, DeviceObj) External (PR.CPU5, DeviceObj) External (PR.CPU6, DeviceObj) External (PR.CPU7, DeviceObj)
Scope (\_PR_.CPU0)
{
Method (_INI, 0, NotSerialized)
{
Store ("ssdtPRGen version....: 13.4 / Mac OS X 10.9.3 (13D45a)", Debug)
Store ("target processor.....: i7-3770K", Debug)
Store ("running processor....: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz", Debug)
Store ("baseFrequency........: 1600", Debug)
Store ("frequency............: 3500", Debug)
Store ("busFrequency.........: 100", Debug)
Store ("logicalCPUs..........: 8", Debug)
Store ("maximum TDP..........: 77", Debug)
Store ("packageLength........: 24", Debug)
Store ("turboStates..........: 4", Debug)
Store ("maxTurboFrequency....: 3900", Debug)
Store ("machdep.xcpm.mode....: 1", Debug)
}
Name (APLF, Zero)
Name (APSN, 0x04)
Name (APSS, Package (0x18)
{
/* High Frequency Modes (turbo) */
Package (0x06) { 0x0F3C, 0x012CC8, 0x0A, 0x0A, 0x2700, 0x2700 },
Package (0x06) { 0x0ED8, 0x012CC8, 0x0A, 0x0A, 0x2600, 0x2600 },
Package (0x06) { 0x0E74, 0x012CC8, 0x0A, 0x0A, 0x2500, 0x2500 },
Package (0x06) { 0x0E10, 0x012CC8, 0x0A, 0x0A, 0x2400, 0x2400 },
/* High Frequency Modes (non-turbo) */
Package (0x06) { 0x0DAC, 0x012CC8, 0x0A, 0x0A, 0x2300, 0x2300 },
Package (0x06) { 0x0D48, 0x0120E0, 0x0A, 0x0A, 0x2200, 0x2200 },
Package (0x06) { 0x0CE4, 0x01152F, 0x0A, 0x0A, 0x2100, 0x2100 },
Package (0x06) { 0x0C80, 0x0109B4, 0x0A, 0x0A, 0x2000, 0x2000 },
Package (0x06) { 0x0C1C, 0x00FE6F, 0x0A, 0x0A, 0x1F00, 0x1F00 },
Package (0x06) { 0x0BB8, 0x00F35F, 0x0A, 0x0A, 0x1E00, 0x1E00 },
Package (0x06) { 0x0B54, 0x00E884, 0x0A, 0x0A, 0x1D00, 0x1D00 },
Package (0x06) { 0x0AF0, 0x00DDDD, 0x0A, 0x0A, 0x1C00, 0x1C00 },
Package (0x06) { 0x0A8C, 0x00D36A, 0x0A, 0x0A, 0x1B00, 0x1B00 },
Package (0x06) { 0x0A28, 0x00C92B, 0x0A, 0x0A, 0x1A00, 0x1A00 },
Package (0x06) { 0x09C4, 0x00BF1F, 0x0A, 0x0A, 0x1900, 0x1900 },
Package (0x06) { 0x0960, 0x00B546, 0x0A, 0x0A, 0x1800, 0x1800 },
Package (0x06) { 0x08FC, 0x00AB9F, 0x0A, 0x0A, 0x1700, 0x1700 },
Package (0x06) { 0x0898, 0x00A229, 0x0A, 0x0A, 0x1600, 0x1600 },
Package (0x06) { 0x0834, 0x0098E6, 0x0A, 0x0A, 0x1500, 0x1500 },
Package (0x06) { 0x07D0, 0x008FD3, 0x0A, 0x0A, 0x1400, 0x1400 },
Package (0x06) { 0x076C, 0x0086F1, 0x0A, 0x0A, 0x1300, 0x1300 },
Package (0x06) { 0x0708, 0x007E3F, 0x0A, 0x0A, 0x1200, 0x1200 },
Package (0x06) { 0x06A4, 0x0075BD, 0x0A, 0x0A, 0x1100, 0x1100 },
/* Low Frequency Mode */
Package (0x06) { 0x0640, 0x006D6A, 0x0A, 0x0A, 0x1000, 0x1000 }
})
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU0.ACST Called", Debug)
Store ("CPU0 C-States : 13", Debug)
/* Low Power Modes for CPU0 */
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
Zero,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x03,
0xCD,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x06,
0xF5,
0x015E
}
})
}
Method (_DSM, 4, NotSerialized)
{
Store ("Method CPU0._DSM Called", Debug)
If (LEqual (Arg2, Zero))
{
Return (Buffer (One)
{
0x03
})
}
Return (Package (0x02)
{
"plugin-type",
One
})
}
}
Scope (\_PR_.CPU1)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU1.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU1.ACST Called", Debug)
Store ("CPU1 C-States : 7", Debug)
/* Low Power Modes for CPU1 */
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
0x03E8,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x02,
0x94,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x03,
0xA9,
0x15E
}
})
}
}
Scope (\_PR_.CPU2)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU2.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU3)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU3.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU4)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU4.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU5)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU5.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU6)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU6.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU7)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU7.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
}
After test -w 3 P-State 16,25,30,35,37,38,39 error kernel[0]: IOPPF: XCPM mode kernel[0]: XCPM: P-state table mismatch (error:0x11) kernel[0]: X86PlatformShim::sendPStates - pmCPUControl (XCPMIO_SETPSTATETABLE) returned 0x11 kernel[0]: X86PlatformShim::start - Failed to send PStates kernel[0]: X86PlatformShim::start - Failed to send stepper ssdt.dsl /*
DefinitionBlock ("ssdt.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00013400) { External (PR.CPU0, DeviceObj) External (PR.CPU1, DeviceObj) External (PR.CPU2, DeviceObj) External (PR.CPU3, DeviceObj) External (PR.CPU4, DeviceObj) External (PR.CPU5, DeviceObj) External (PR.CPU6, DeviceObj) External (PR.CPU7, DeviceObj)
Scope (\_PR_.CPU0)
{
Method (_INI, 0, NotSerialized)
{
Store ("ssdtPRGen version....: 13.4 / Mac OS X 10.9.3 (13D45a)", Debug)
Store ("target processor.....: i7-3770K", Debug)
Store ("running processor....: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz", Debug)
Store ("baseFrequency........: 1600", Debug)
Store ("frequency............: 3500", Debug)
Store ("busFrequency.........: 100", Debug)
Store ("logicalCPUs..........: 8", Debug)
Store ("maximum TDP..........: 77", Debug)
Store ("packageLength........: 24", Debug)
Store ("turboStates..........: 4", Debug)
Store ("maxTurboFrequency....: 3900", Debug)
Store ("machdep.xcpm.mode....: 1", Debug)
}
Name (APLF, Zero)
Name (APSN, 0x04)
Name (APSS, Package (0x18)
{
/* High Frequency Modes (turbo) */
Package (0x06) { 0x0F3C, 0x012CC8, 0x0A, 0x0A, 0x2700, 0x2700 },
Package (0x06) { 0x0ED8, 0x012CC8, 0x0A, 0x0A, 0x2600, 0x2600 },
Package (0x06) { 0x0E74, 0x012CC8, 0x0A, 0x0A, 0x2500, 0x2500 },
Package (0x06) { 0x0E10, 0x012CC8, 0x0A, 0x0A, 0x2400, 0x2400 },
/* High Frequency Modes (non-turbo) */
Package (0x06) { 0x0DAC, 0x012CC8, 0x0A, 0x0A, 0x2300, 0x2300 },
Package (0x06) { 0x0D48, 0x0120E0, 0x0A, 0x0A, 0x2200, 0x2200 },
Package (0x06) { 0x0CE4, 0x01152F, 0x0A, 0x0A, 0x2100, 0x2100 },
Package (0x06) { 0x0C80, 0x0109B4, 0x0A, 0x0A, 0x2000, 0x2000 },
Package (0x06) { 0x0C1C, 0x00FE6F, 0x0A, 0x0A, 0x1F00, 0x1F00 },
Package (0x06) { 0x0BB8, 0x00F35F, 0x0A, 0x0A, 0x1E00, 0x1E00 },
Package (0x06) { 0x0B54, 0x00E884, 0x0A, 0x0A, 0x1D00, 0x1D00 },
Package (0x06) { 0x0AF0, 0x00DDDD, 0x0A, 0x0A, 0x1C00, 0x1C00 },
Package (0x06) { 0x0A8C, 0x00D36A, 0x0A, 0x0A, 0x1B00, 0x1B00 },
Package (0x06) { 0x0A28, 0x00C92B, 0x0A, 0x0A, 0x1A00, 0x1A00 },
Package (0x06) { 0x09C4, 0x00BF1F, 0x0A, 0x0A, 0x1900, 0x1900 },
Package (0x06) { 0x0960, 0x00B546, 0x0A, 0x0A, 0x1800, 0x1800 },
Package (0x06) { 0x08FC, 0x00AB9F, 0x0A, 0x0A, 0x1700, 0x1700 },
Package (0x06) { 0x0898, 0x00A229, 0x0A, 0x0A, 0x1600, 0x1600 },
Package (0x06) { 0x0834, 0x0098E6, 0x0A, 0x0A, 0x1500, 0x1500 },
Package (0x06) { 0x07D0, 0x008FD3, 0x0A, 0x0A, 0x1400, 0x1400 },
Package (0x06) { 0x076C, 0x0086F1, 0x0A, 0x0A, 0x1300, 0x1300 },
Package (0x06) { 0x0708, 0x007E3F, 0x0A, 0x0A, 0x1200, 0x1200 },
Package (0x06) { 0x06A4, 0x0075BD, 0x0A, 0x0A, 0x1100, 0x1100 },
/* Low Frequency Mode */
Package (0x06) { 0x0640, 0x006D6A, 0x0A, 0x0A, 0x1000, 0x1000 }
})
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU0.ACST Called", Debug)
Store ("CPU0 C-States : 13", Debug)
/* Low Power Modes for CPU0 */
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
Zero,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x03,
0xCD,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x06,
0xF5,
0x015E
}
})
}
Method (_DSM, 4, NotSerialized)
{
Store ("Method CPU0._DSM Called", Debug)
If (LEqual (Arg2, Zero))
{
Return (Buffer (One)
{
0x03
})
}
Return (Package (0x02)
{
"plugin-type",
One
})
}
}
Scope (\_PR_.CPU1)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU1.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU1.ACST Called", Debug)
Store ("CPU1 C-States : 7", Debug)
/* Low Power Modes for CPU1 */
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
0x03E8,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x02,
0x94,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x03,
0xA9,
0x15E
}
})
}
}
Scope (\_PR_.CPU2)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU2.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU3)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU3.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU4)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU4.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU5)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU5.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU6)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU6.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU7)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU7.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
}
What is error 0x11? com.apple.kextcache[332]: /System/Library/Extensions/IOPlatformPluginFamily.kext/Contents/PlugIns/X86PlatformPlugin.kext is not authentic; omitting from prelinked kernel. com.apple.kextcache[332]: Can't use X86PlatformPlugin.kext - not linked. com.apple.kextcache[332]: Prelink failed for com.apple.driver.X86PlatformShim; omitting from prelinked kernel.
Your test with -w 1 is not ok. There is no line with the text: Store ("IvyWorkArounds.......: 1", Debug) Try again, and use the vanilla kexts. Don't edit them. Inject the data from another kext – there's plenty examples of them.
Ok.I tested after work. I will instalation new OS X and change smbio to Macmini6,2 and Mavericks 10.9.2.And Test again to scratch..Tell me which command use for test to scratch. Does the frequency vector plays a role on Ivy Bridge CPU?
There should be no need to reinstall OS X. Just run: ./ssdtPRGen.sh -w 1 and check the generated SSDT to see if you can find the line: "Store ("IvyWorkArounds.......: 1", Debug)" That has to be there. Then you can reboot (twice) to see of it works.
kernel[0]: X86PlatformPlugin::setRingTable - AICPM failed to load ring table with status 0x0: Get=0, Load=0, Install=0 kernel[0]: X86PlatformPlugin::configResourceHandler - Failed to set ring table! kernel[0]: IOPPF: XCPM mode kernel[0]: XCPM: P-state table mismatch (error:0x11) kernel[0]: X86PlatformShim::sendPStates - pmCPUControl (XCPMIO_SETPSTATETABLE) returned 0x11 kernel[0]: X86PlatformShim::start - Failed to send PStates kernel[0]: X86PlatformShim::start - Failed to send stepper kernel[0]: [AGPM Controller] unknownPlatform
ssdtPRGen.sh v0.9 Copyright (c) 2011-2012 by † RevoGirl v6.6 Copyright (c) 2013 by † Jeroen
Bugs > https://github.com/Piker-Alpha/ssdtPRGen.sh/issues <
Override value: (-w) Ivy Bridge workarounds, now set to: 1!
System information: Mac OS X 10.9.2 (13C64) Brandstring 'Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz'
Scope (PR) {220 bytes} with ACPI Processor declarations found in the DSDT (ACPI 1.0 compliant) Generating ssdt.dsl for a 'Macmini6,2' with board-id [Mac-F65AE981FFA204ED] Ivy Bridge Core i7-3770K processor [0x306A9] setup [0x0704] With a maximum TDP of 77 Watt, as specified by Intel Number logical CPU's: 8 (Core Frequency: 3500 MHz) Number of Turbo States: 4 (3600-3900 MHz) Number of P-States: 24 (1600-3900 MHz)
XCPM mode detected (Ivy Bridge workarounds disabled)
Injected C-States for CPU0 (C1,C3,C6) Injected C-States for CPU1 (C1,C2,C3)
Intel ACPI Component Architecture ASL Optimizing Compiler version 20130117-64 [Jan 19 2013] Copyright (c) 2000 - 2013 Intel Corporation
ASL Input: /Users/icrusher/Desktop/ssdt.dsl - 303 lines, 8860 bytes, 71 keywords AML Output: /Users/icrusher/Desktop/ssdt.aml - 1993 bytes, 28 named objects, 43 executable opcodes
Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 0 Optimizations
Do you want to copy /Users/icrusher/Desktop/ssdt.aml to /Extra/ssdt.aml? (y/n)? y Creating temporarily mount point: /Volumes/EFI Mounting EFI partition... mount_hfs: Invalid argument umount: /Volumes/EFI: not currently mounted Do you want to open ssdt.dsl (y/n)?
After infall new OS X and -w 1 and after two restart.
/*
DefinitionBlock ("ssdt.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00013500) { External (PR.CPU0, DeviceObj) External (PR.CPU1, DeviceObj) External (PR.CPU2, DeviceObj) External (PR.CPU3, DeviceObj) External (PR.CPU4, DeviceObj) External (PR.CPU5, DeviceObj) External (PR.CPU6, DeviceObj) External (PR.CPU7, DeviceObj)
Scope (\_PR_.CPU0)
{
Method (_INI, 0, NotSerialized)
{
Store ("ssdtPRGen version....: 13.5 / Mac OS X 10.9.2 (13C64)", Debug)
Store ("target processor.....: i7-3770K", Debug)
Store ("running processor....: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz", Debug)
Store ("baseFrequency........: 1600", Debug)
Store ("frequency............: 3500", Debug)
Store ("busFrequency.........: 100", Debug)
Store ("logicalCPUs..........: 8", Debug)
Store ("maximum TDP..........: 77", Debug)
Store ("packageLength........: 24", Debug)
Store ("turboStates..........: 4", Debug)
Store ("maxTurboFrequency....: 3900", Debug)
Store ("IvyWorkArounds.......: 1", Debug)
Store ("machdep.xcpm.mode....: 0", Debug)
}
Name (APLF, Zero)
Name (APSN, 0x05)
Name (APSS, Package (0x19)
{
/* Workaround for the Ivy Bridge PM 'bug' */
Package (0x06) { 0x0F3D, 0x012CC8, 0x0A, 0x0A, 0x2800, 0x2800 },
/* High Frequency Modes (turbo) */
Package (0x06) { 0x0F3C, 0x012CC8, 0x0A, 0x0A, 0x2700, 0x2700 },
Package (0x06) { 0x0ED8, 0x012CC8, 0x0A, 0x0A, 0x2600, 0x2600 },
Package (0x06) { 0x0E74, 0x012CC8, 0x0A, 0x0A, 0x2500, 0x2500 },
Package (0x06) { 0x0E10, 0x012CC8, 0x0A, 0x0A, 0x2400, 0x2400 },
/* High Frequency Modes (non-turbo) */
Package (0x06) { 0x0DAC, 0x012CC8, 0x0A, 0x0A, 0x2300, 0x2300 },
Package (0x06) { 0x0D48, 0x0120E0, 0x0A, 0x0A, 0x2200, 0x2200 },
Package (0x06) { 0x0CE4, 0x01152F, 0x0A, 0x0A, 0x2100, 0x2100 },
Package (0x06) { 0x0C80, 0x0109B4, 0x0A, 0x0A, 0x2000, 0x2000 },
Package (0x06) { 0x0C1C, 0x00FE6F, 0x0A, 0x0A, 0x1F00, 0x1F00 },
Package (0x06) { 0x0BB8, 0x00F35F, 0x0A, 0x0A, 0x1E00, 0x1E00 },
Package (0x06) { 0x0B54, 0x00E884, 0x0A, 0x0A, 0x1D00, 0x1D00 },
Package (0x06) { 0x0AF0, 0x00DDDD, 0x0A, 0x0A, 0x1C00, 0x1C00 },
Package (0x06) { 0x0A8C, 0x00D36A, 0x0A, 0x0A, 0x1B00, 0x1B00 },
Package (0x06) { 0x0A28, 0x00C92B, 0x0A, 0x0A, 0x1A00, 0x1A00 },
Package (0x06) { 0x09C4, 0x00BF1F, 0x0A, 0x0A, 0x1900, 0x1900 },
Package (0x06) { 0x0960, 0x00B546, 0x0A, 0x0A, 0x1800, 0x1800 },
Package (0x06) { 0x08FC, 0x00AB9F, 0x0A, 0x0A, 0x1700, 0x1700 },
Package (0x06) { 0x0898, 0x00A229, 0x0A, 0x0A, 0x1600, 0x1600 },
Package (0x06) { 0x0834, 0x0098E6, 0x0A, 0x0A, 0x1500, 0x1500 },
Package (0x06) { 0x07D0, 0x008FD3, 0x0A, 0x0A, 0x1400, 0x1400 },
Package (0x06) { 0x076C, 0x0086F1, 0x0A, 0x0A, 0x1300, 0x1300 },
Package (0x06) { 0x0708, 0x007E3F, 0x0A, 0x0A, 0x1200, 0x1200 },
Package (0x06) { 0x06A4, 0x0075BD, 0x0A, 0x0A, 0x1100, 0x1100 },
/* Low Frequency Mode */
Package (0x06) { 0x0640, 0x006D6A, 0x0A, 0x0A, 0x1000, 0x1000 }
})
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU0.ACST Called", Debug)
Store ("CPU0 C-States : 13", Debug)
/* Low Power Modes for CPU0 */
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
Zero,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x03,
0xCD,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x06,
0xF5,
0x015E
}
})
}
Method (_DSM, 4, NotSerialized)
{
Store ("Method CPU0._DSM Called", Debug)
If (LEqual (Arg2, Zero))
{
Return (Buffer (One)
{
0x03
})
}
Return (Package (0x02)
{
"plugin-type",
One
})
}
}
Scope (\_PR_.CPU1)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU1.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU1.ACST Called", Debug)
Store ("CPU1 C-States : 7", Debug)
/* Low Power Modes for CPU1 */
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
0x03E8,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x02,
0x94,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000030, // Address
0x03, // Access Size
)
},
0x03,
0xC6,
0xC8
}
})
}
}
Scope (\_PR_.CPU2)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU2.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU3)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU3.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU4)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU4.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU5)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU5.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU6)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU6.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
Scope (\_PR_.CPU7)
{
Method (APSS, 0, NotSerialized)
{
Store ("Method _PR_.CPU7.APSS Called", Debug)
Return (\_PR_.CPU0.APSS)
}
Method (ACST, 0, NotSerialized) { Return (\_PR_.CPU1.ACST ()) }
}
}
This is ssdt.aml /*
Compiler Version 0x20130117 (538116375)
*/ DefinitionBlock ("iASLy7NnTO.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00013500) { External (PR.CPU7, DeviceObj) External (PR.CPU6, DeviceObj) External (PR.CPU5, DeviceObj) External (PR.CPU4, DeviceObj) External (PR.CPU3, DeviceObj) External (PR.CPU2, DeviceObj) External (PR.CPU1, DeviceObj) External (PR.CPU0, DeviceObj)
Scope (_PR.CPU0) { Method (_INI, 0, NotSerialized) { Store ("ssdtPRGen version....: 13.5 / Mac OS X 10.9.2 (13C64)", Debug) Store ("target processor.....: i7-3770K", Debug) Store ("running processor....: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz", Debug) Store ("baseFrequency........: 1600", Debug) Store ("frequency............: 3500", Debug) Store ("busFrequency.........: 100", Debug) Store ("logicalCPUs..........: 8", Debug) Store ("maximum TDP..........: 77", Debug) Store ("packageLength........: 24", Debug) Store ("turboStates..........: 4", Debug) Store ("maxTurboFrequency....: 3900", Debug) Store ("IvyWorkArounds.......: 1", Debug) Store ("machdep.xcpm.mode....: 0", Debug) }
Name (APLF, Zero)
Name (APSN, 0x05)
Name (APSS, Package (0x19)
{
Package (0x06)
{
0x0F3D,
0x00012CC8,
0x0A,
0x0A,
0x2800,
0x2800
},
Package (0x06)
{
0x0F3C,
0x00012CC8,
0x0A,
0x0A,
0x2700,
0x2700
},
Package (0x06)
{
0x0ED8,
0x00012CC8,
0x0A,
0x0A,
0x2600,
0x2600
},
Package (0x06)
{
0x0E74,
0x00012CC8,
0x0A,
0x0A,
0x2500,
0x2500
},
Package (0x06)
{
0x0E10,
0x00012CC8,
0x0A,
0x0A,
0x2400,
0x2400
},
Package (0x06)
{
0x0DAC,
0x00012CC8,
0x0A,
0x0A,
0x2300,
0x2300
},
Package (0x06)
{
0x0D48,
0x000120E0,
0x0A,
0x0A,
0x2200,
0x2200
},
Package (0x06)
{
0x0CE4,
0x0001152F,
0x0A,
0x0A,
0x2100,
0x2100
},
Package (0x06)
{
0x0C80,
0x000109B4,
0x0A,
0x0A,
0x2000,
0x2000
},
Package (0x06)
{
0x0C1C,
0xFE6F,
0x0A,
0x0A,
0x1F00,
0x1F00
},
Package (0x06)
{
0x0BB8,
0xF35F,
0x0A,
0x0A,
0x1E00,
0x1E00
},
Package (0x06)
{
0x0B54,
0xE884,
0x0A,
0x0A,
0x1D00,
0x1D00
},
Package (0x06)
{
0x0AF0,
0xDDDD,
0x0A,
0x0A,
0x1C00,
0x1C00
},
Package (0x06)
{
0x0A8C,
0xD36A,
0x0A,
0x0A,
0x1B00,
0x1B00
},
Package (0x06)
{
0x0A28,
0xC92B,
0x0A,
0x0A,
0x1A00,
0x1A00
},
Package (0x06)
{
0x09C4,
0xBF1F,
0x0A,
0x0A,
0x1900,
0x1900
},
Package (0x06)
{
0x0960,
0xB546,
0x0A,
0x0A,
0x1800,
0x1800
},
Package (0x06)
{
0x08FC,
0xAB9F,
0x0A,
0x0A,
0x1700,
0x1700
},
Package (0x06)
{
0x0898,
0xA229,
0x0A,
0x0A,
0x1600,
0x1600
},
Package (0x06)
{
0x0834,
0x98E6,
0x0A,
0x0A,
0x1500,
0x1500
},
Package (0x06)
{
0x07D0,
0x8FD3,
0x0A,
0x0A,
0x1400,
0x1400
},
Package (0x06)
{
0x076C,
0x86F1,
0x0A,
0x0A,
0x1300,
0x1300
},
Package (0x06)
{
0x0708,
0x7E3F,
0x0A,
0x0A,
0x1200,
0x1200
},
Package (0x06)
{
0x06A4,
0x75BD,
0x0A,
0x0A,
0x1100,
0x1100
},
Package (0x06)
{
0x0640,
0x6D6A,
0x0A,
0x0A,
0x1000,
0x1000
}
})
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU0.ACST Called", Debug)
Store ("CPU0 C-States : 13", Debug)
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
Zero,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x03,
0xCD,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x06,
0xF5,
0x015E
}
})
}
Method (_DSM, 4, NotSerialized)
{
Store ("Method CPU0._DSM Called", Debug)
If (LEqual (Arg2, Zero))
{
Return (Buffer (One)
{
0x03
})
}
Return (Package (0x02)
{
"plugin-type",
One
})
}
}
Scope (_PR.CPU1) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU1.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU1.ACST Called", Debug)
Store ("CPU1 C-States : 7", Debug)
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
0x03E8,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x02,
0x94,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000030, // Address
0x03, // Access Size
)
},
0x03,
0xC6,
0xC8
}
})
}
}
Scope (_PR.CPU2) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU2.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (_PR.CPU3) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU3.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (_PR.CPU4) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU4.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (_PR.CPU5) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU5.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (_PR.CPU6) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU6.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (_PR.CPU7) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU7.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
} }
P-State 16,25,30,35,37,38,39
kernel[0]: 0xE2: 0x1e000007 kernel[0]: X86PlatformPlugin::setRingTable - AICPM failed to load ring table with status 0x0: Get=0, Load=0, Install=0 kernel[0]: X86PlatformPlugin::configResourceHandler - Failed to set ring table! kernel[0]: IOPPF: AppleIntelCPUPowerManagement mode kernel[0]: [AGPM Controller] unknownPlatform
Look at this line: IOPPF: AppleIntelCPUPowerManagement mode You are now using the AppleIntelCPUPowerManagement.kext which is fine, but then you need to use -w 3 like ever before.
After -w 3 same P-State and this SSDT.aml /*
Compiler Version 0x20130117 (538116375)
*/ DefinitionBlock ("iASLJKw4N8.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00013500) { External (PR.CPU7, DeviceObj) External (PR.CPU6, DeviceObj) External (PR.CPU5, DeviceObj) External (PR.CPU4, DeviceObj) External (PR.CPU3, DeviceObj) External (PR.CPU2, DeviceObj) External (PR.CPU1, DeviceObj) External (PR.CPU0, DeviceObj)
Scope (_PR.CPU0) { Method (_INI, 0, NotSerialized) { Store ("ssdtPRGen version....: 13.5 / Mac OS X 10.9.2 (13C64)", Debug) Store ("target processor.....: i7-3770K", Debug) Store ("running processor....: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz", Debug) Store ("baseFrequency........: 1600", Debug) Store ("frequency............: 3500", Debug) Store ("busFrequency.........: 100", Debug) Store ("logicalCPUs..........: 8", Debug) Store ("maximum TDP..........: 77", Debug) Store ("packageLength........: 24", Debug) Store ("turboStates..........: 4", Debug) Store ("maxTurboFrequency....: 3900", Debug) Store ("machdep.xcpm.mode....: 1", Debug) }
Name (APLF, Zero)
Name (APSN, 0x04)
Name (APSS, Package (0x18)
{
Package (0x06)
{
0x0F3C,
0x00012CC8,
0x0A,
0x0A,
0x2700,
0x2700
},
Package (0x06)
{
0x0ED8,
0x00012CC8,
0x0A,
0x0A,
0x2600,
0x2600
},
Package (0x06)
{
0x0E74,
0x00012CC8,
0x0A,
0x0A,
0x2500,
0x2500
},
Package (0x06)
{
0x0E10,
0x00012CC8,
0x0A,
0x0A,
0x2400,
0x2400
},
Package (0x06)
{
0x0DAC,
0x00012CC8,
0x0A,
0x0A,
0x2300,
0x2300
},
Package (0x06)
{
0x0D48,
0x000120E0,
0x0A,
0x0A,
0x2200,
0x2200
},
Package (0x06)
{
0x0CE4,
0x0001152F,
0x0A,
0x0A,
0x2100,
0x2100
},
Package (0x06)
{
0x0C80,
0x000109B4,
0x0A,
0x0A,
0x2000,
0x2000
},
Package (0x06)
{
0x0C1C,
0xFE6F,
0x0A,
0x0A,
0x1F00,
0x1F00
},
Package (0x06)
{
0x0BB8,
0xF35F,
0x0A,
0x0A,
0x1E00,
0x1E00
},
Package (0x06)
{
0x0B54,
0xE884,
0x0A,
0x0A,
0x1D00,
0x1D00
},
Package (0x06)
{
0x0AF0,
0xDDDD,
0x0A,
0x0A,
0x1C00,
0x1C00
},
Package (0x06)
{
0x0A8C,
0xD36A,
0x0A,
0x0A,
0x1B00,
0x1B00
},
Package (0x06)
{
0x0A28,
0xC92B,
0x0A,
0x0A,
0x1A00,
0x1A00
},
Package (0x06)
{
0x09C4,
0xBF1F,
0x0A,
0x0A,
0x1900,
0x1900
},
Package (0x06)
{
0x0960,
0xB546,
0x0A,
0x0A,
0x1800,
0x1800
},
Package (0x06)
{
0x08FC,
0xAB9F,
0x0A,
0x0A,
0x1700,
0x1700
},
Package (0x06)
{
0x0898,
0xA229,
0x0A,
0x0A,
0x1600,
0x1600
},
Package (0x06)
{
0x0834,
0x98E6,
0x0A,
0x0A,
0x1500,
0x1500
},
Package (0x06)
{
0x07D0,
0x8FD3,
0x0A,
0x0A,
0x1400,
0x1400
},
Package (0x06)
{
0x076C,
0x86F1,
0x0A,
0x0A,
0x1300,
0x1300
},
Package (0x06)
{
0x0708,
0x7E3F,
0x0A,
0x0A,
0x1200,
0x1200
},
Package (0x06)
{
0x06A4,
0x75BD,
0x0A,
0x0A,
0x1100,
0x1100
},
Package (0x06)
{
0x0640,
0x6D6A,
0x0A,
0x0A,
0x1000,
0x1000
}
})
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU0.ACST Called", Debug)
Store ("CPU0 C-States : 13", Debug)
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
Zero,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x03,
0xCD,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x06,
0xF5,
0x015E
}
})
}
Method (_DSM, 4, NotSerialized)
{
Store ("Method CPU0._DSM Called", Debug)
If (LEqual (Arg2, Zero))
{
Return (Buffer (One)
{
0x03
})
}
Return (Package (0x02)
{
"plugin-type",
One
})
}
}
Scope (_PR.CPU1) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU1.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU1.ACST Called", Debug)
Store ("CPU1 C-States : 7", Debug)
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
0x03E8,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x02,
0x94,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000030, // Address
0x03, // Access Size
)
},
0x03,
0xC6,
0xC8
}
})
}
}
Scope (_PR.CPU2) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU2.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (_PR.CPU3) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU3.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (_PR.CPU4) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU4.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (_PR.CPU5) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU5.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (_PR.CPU6) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU6.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (_PR.CPU7) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU7.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
} } But don't see IOPPF: AppleIntelCPUPowerManagement mode
Do you have another solution?This is only same.
I think that you are having difficulties understanding how ssdtPRGen.sh works. Not that I can blame you, because when -xcpm is used in com.apple.Boot.plist when you run the script, then it basically eliminates the -w n setting. I need to fix this for a next update. Anyway. Try this:
1.) Remove the -xcpm flag under 'Kernel Flags' in com.apple.Boot.plist 2.) run ./ssdtPRGen.sh -w 3 -x 0 3.) Reboot
Now you should be using the AppleIntelCPUPowerMagement.kext and see this message: kernel[0]: IOPPF: AppleIntelCPUPowerManagement mode and see this in the SSDT:
Store ("IvyWorkArounds.......: 3", Debug) Store ("machdep.xcpm.mode....: 0", Debug)
Note: The message is the one you have seen before, because you used it in one of your replies here.
My bios https://plus.google.com/u/0/photos?pids=6013717556743888914,6013717882861299890,6013717977150986498,6013718092729064658&oid=108560053440137869903&pid=6013717977150986498 https://plus.google.com/u/0/photos?pids=6013717556743888914,6013717882861299890,6013717977150986498,6013718092729064658&oid=108560053440137869903&pid=6013718092729064658
My bios:
Aha. You have a 3.4 GHz* CPU but you changed it to 3.5 GHz and that may be a problem for Apple power management. Set the CPU frequency to 3.4GHz and use four different turbo states, like: 35, 37, 38 and 39. The turbo states should start at 35, because that is what the software expects.
No I have a this CPU. http://ark.intel.com/products/65523 No 3770.... After work I post picture from bios but the the evidence. This is default bios.
This is my really CPU:
Silly error. My mistake. Anyway. Always set the first turbo multiplier to the clock frequency plus 1. In your case 36 and not 37. That's a start, but the strange thing is that you had P-States so now I wonder what boot loader you are using, and if you are dropping the factory SSDT tables. What else is driving power management?
After update my system to 10.9.3 my monitor is black and I use a SMBIOS iMac13,2. I use command -w3 and -x 0.My boot in console is kernel[0]: Darwin Kernel Version 13.2.0: Thu Apr 17 23:03:13 PDT 2014; root:xnu-2422.100.13~1/RELEASE_X86_64 kernel[0]: IOPPF: AppleIntelCPUPowerManagement mode kernel[0]: "Kernel-__SYMTAB" not a kext kernel[0]: ACPI: sleep states S3 S4 S5 PM kernel[0]: AppleIntelCPUPowerManagement: Turbo Ratios 4444 kernel[0]: AppleIntelCPUPowerManagement: (built 23:35:25 Apr 17 2014) initialization complete kernel[0]: HWSensors v5.3.1100 Copyright 2013 netkas, slice, usr-sse2, kozlek, navi, THe KiNG, RehabMan. All rights reserved. kernel[0]: CPUSensors: setting platform keys to [d8 ] kernel[0]: ACPISensors (TZ00): started kernel[0]: CPUSensors: base CPU multiplier is 35 kernel[0]: CPUSensors: RAPL units power: 0x3 energy: 0x10 time: 0xa kernel[0]: AppleIntelCPUPowerManagementClient: ready kernel[0]: IOPPF: AppleIntelCPUPowerManagement mode My SSDT is this: /*
Compiler Version 0x20130117 (538116375)
*/ DefinitionBlock ("iASLnIDWqm.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00013500) { External (PR.CPU7, DeviceObj) External (PR.CPU6, DeviceObj) External (PR.CPU5, DeviceObj) External (PR.CPU4, DeviceObj) External (PR.CPU3, DeviceObj) External (PR.CPU2, DeviceObj) External (PR.CPU1, DeviceObj) External (PR.CPU0, DeviceObj)
Scope (_PR.CPU0) { Method (_INI, 0, NotSerialized) { Store ("ssdtPRGen version....: 13.5 / Mac OS X 10.9.3 (13D65)", Debug) Store ("target processor.....: i7-3770K", Debug) Store ("running processor....: Intel(R) Core(TM) i7-3770K CPU @ 3.50GHz", Debug) Store ("baseFrequency........: 1600", Debug) Store ("frequency............: 3500", Debug) Store ("busFrequency.........: 100", Debug) Store ("logicalCPUs..........: 8", Debug) Store ("maximum TDP..........: 77", Debug) Store ("packageLength........: 24", Debug) Store ("turboStates..........: 4", Debug) Store ("maxTurboFrequency....: 3900", Debug) Store ("IvyWorkArounds.......: 3", Debug) Store ("machdep.xcpm.mode....: 0", Debug) }
Name (APLF, 0x08)
Name (APSN, 0x05)
Name (APSS, Package (0x21)
{
Package (0x06)
{
0x0F3D,
0x00012CC8,
0x0A,
0x0A,
0x2800,
0x2800
},
Package (0x06)
{
0x0F3C,
0x00012CC8,
0x0A,
0x0A,
0x2700,
0x2700
},
Package (0x06)
{
0x0ED8,
0x00012CC8,
0x0A,
0x0A,
0x2600,
0x2600
},
Package (0x06)
{
0x0E74,
0x00012CC8,
0x0A,
0x0A,
0x2500,
0x2500
},
Package (0x06)
{
0x0E10,
0x00012CC8,
0x0A,
0x0A,
0x2400,
0x2400
},
Package (0x06)
{
0x0DAC,
0x00012CC8,
0x0A,
0x0A,
0x2300,
0x2300
},
Package (0x06)
{
0x0D48,
0x000120E0,
0x0A,
0x0A,
0x2200,
0x2200
},
Package (0x06)
{
0x0CE4,
0x0001152F,
0x0A,
0x0A,
0x2100,
0x2100
},
Package (0x06)
{
0x0C80,
0x000109B4,
0x0A,
0x0A,
0x2000,
0x2000
},
Package (0x06)
{
0x0C1C,
0xFE6F,
0x0A,
0x0A,
0x1F00,
0x1F00
},
Package (0x06)
{
0x0BB8,
0xF35F,
0x0A,
0x0A,
0x1E00,
0x1E00
},
Package (0x06)
{
0x0B54,
0xE884,
0x0A,
0x0A,
0x1D00,
0x1D00
},
Package (0x06)
{
0x0AF0,
0xDDDD,
0x0A,
0x0A,
0x1C00,
0x1C00
},
Package (0x06)
{
0x0A8C,
0xD36A,
0x0A,
0x0A,
0x1B00,
0x1B00
},
Package (0x06)
{
0x0A28,
0xC92B,
0x0A,
0x0A,
0x1A00,
0x1A00
},
Package (0x06)
{
0x09C4,
0xBF1F,
0x0A,
0x0A,
0x1900,
0x1900
},
Package (0x06)
{
0x0960,
0xB546,
0x0A,
0x0A,
0x1800,
0x1800
},
Package (0x06)
{
0x08FC,
0xAB9F,
0x0A,
0x0A,
0x1700,
0x1700
},
Package (0x06)
{
0x0898,
0xA229,
0x0A,
0x0A,
0x1600,
0x1600
},
Package (0x06)
{
0x0834,
0x98E6,
0x0A,
0x0A,
0x1500,
0x1500
},
Package (0x06)
{
0x07D0,
0x8FD3,
0x0A,
0x0A,
0x1400,
0x1400
},
Package (0x06)
{
0x076C,
0x86F1,
0x0A,
0x0A,
0x1300,
0x1300
},
Package (0x06)
{
0x0708,
0x7E3F,
0x0A,
0x0A,
0x1200,
0x1200
},
Package (0x06)
{
0x06A4,
0x75BD,
0x0A,
0x0A,
0x1100,
0x1100
},
Package (0x06)
{
0x0640,
0x6D6A,
0x0A,
0x0A,
0x1000,
0x1000
},
Package (0x06)
{
0x05DC,
Zero,
0x0A,
0x0A,
0x0F00,
0x0F00
},
Package (0x06)
{
0x0578,
Zero,
0x0A,
0x0A,
0x0E00,
0x0E00
},
Package (0x06)
{
0x0514,
Zero,
0x0A,
0x0A,
0x0D00,
0x0D00
},
Package (0x06)
{
0x04B0,
Zero,
0x0A,
0x0A,
0x0C00,
0x0C00
},
Package (0x06)
{
0x044C,
Zero,
0x0A,
0x0A,
0x0B00,
0x0B00
},
Package (0x06)
{
0x03E8,
Zero,
0x0A,
0x0A,
0x0A00,
0x0A00
},
Package (0x06)
{
0x0384,
Zero,
0x0A,
0x0A,
0x0900,
0x0900
},
Package (0x06)
{
0x0320,
Zero,
0x0A,
0x0A,
0x0800,
0x0800
}
})
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU0.ACST Called", Debug)
Store ("CPU0 C-States : 13", Debug)
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
Zero,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x03,
0xCD,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x06,
0xF5,
0x015E
}
})
}
Method (_DSM, 4, NotSerialized)
{
Store ("Method CPU0._DSM Called", Debug)
If (LEqual (Arg2, Zero))
{
Return (Buffer (One)
{
0x03
})
}
Return (Package (0x02)
{
"plugin-type",
One
})
}
}
Scope (_PR.CPU1) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU1.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Store ("Method CPU1.ACST Called", Debug)
Store ("CPU1 C-States : 7", Debug)
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
0x03E8,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x02,
0x94,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x03,
0xA9,
0x015E
}
})
}
}
Scope (_PR.CPU2) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU2.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (_PR.CPU3) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU3.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (_PR.CPU4) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU4.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (_PR.CPU5) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU5.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (_PR.CPU6) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU6.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (_PR.CPU7) { Method (APSS, 0, NotSerialized) { Store ("Method PR.CPU7.APSS Called", Debug) Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
} }
My P-State is 16,39. I remove -xcpm from my org.chameleon.boot.plist
This is my file.DSDT.SSDT,IOReg Explorer,smbios.plist and etc. I send from your email.
This is HW Monitor.What is next.
Piker don't work AppleIntelCPUPowerManagementInfo.kext.I get KP.
About this:
After update my system to 10.9.3 my monitor is black and I use a SMBIOS iMac13,2.
That is unrelated to ssdtPRGen.sh
Now. You can ignore this message:
kernel[0]: "Kernel-__SYMTAB" not a kext
You are now using AppleIntelCPUPowerManagement.kext
kernel[0]: AppleIntelCPUPowerManagementClient: ready kernel[0]: IOPPF: AppleIntelCPUPowerManagement mode
Not only did it boot, but it also allowed you to take screenshots.
Now about this:
My P-State is 16,39. I remove -xcpm from my org.chameleon.boot.plist
That is correct, for iMacs, but this is not right:
PM kernel[0]: AppleIntelCPUPowerManagement: Turbo Ratios 4444
Again. Fix your turbo states. About the KP. What KP? That can be anything. Don't forget that many people are using the exact same processor, without issues.
Ok.Now tell me which use a command.KP is Kernel Panik.I will install new OS.After istall I use command -c 2 -turbo 3900 -t 77 -w 3.This is ok or not?
Do you see my files on your email?
After put my old SSDT i have a P-State 16,22,29,35,38,39 This is SSDT: /*
Compiler Version 0x20130117 (538116375)
*/ DefinitionBlock ("iASL2cZhh7.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00006600) { External (PR.CPU7, DeviceObj) External (PR.CPU6, DeviceObj) External (PR.CPU5, DeviceObj) External (PR.CPU4, DeviceObj) External (PR.CPU3, DeviceObj) External (PR.CPU2, DeviceObj) External (PR.CPU1, DeviceObj) External (PR.CPU0, DeviceObj)
Store ("ssdtPRGen version: 6.6", Debug) Store ("baseFrequency : 1600", Debug) Store ("frequency : 3500", Debug) Store ("busFrequency : 100", Debug) Store ("logicalCPUs : 8", Debug) Store ("tdp : 77", Debug) Store ("packageLength : 24", Debug) Store ("turboStates : 4", Debug) Store ("maxTurboFrequency: 3900", Debug) Scope (_PR.CPU0) { Name (APLF, 0x08) Name (APSN, 0x05) Name (APSS, Package (0x21) { Package (0x06) { 0x0F3D, 0x00012CC8, 0x0A, 0x0A, 0x2800, 0x2800 },
Package (0x06)
{
0x0F3C,
0x00012CC8,
0x0A,
0x0A,
0x2700,
0x2700
},
Package (0x06)
{
0x0ED8,
0x00012CC8,
0x0A,
0x0A,
0x2600,
0x2600
},
Package (0x06)
{
0x0E74,
0x00012CC8,
0x0A,
0x0A,
0x2500,
0x2500
},
Package (0x06)
{
0x0E10,
0x00012CC8,
0x0A,
0x0A,
0x2400,
0x2400
},
Package (0x06)
{
0x0DAC,
0x00012CC8,
0x0A,
0x0A,
0x2300,
0x2300
},
Package (0x06)
{
0x0D48,
0x000120E0,
0x0A,
0x0A,
0x2200,
0x2200
},
Package (0x06)
{
0x0CE4,
0x0001152F,
0x0A,
0x0A,
0x2100,
0x2100
},
Package (0x06)
{
0x0C80,
0x000109B4,
0x0A,
0x0A,
0x2000,
0x2000
},
Package (0x06)
{
0x0C1C,
0xFE6F,
0x0A,
0x0A,
0x1F00,
0x1F00
},
Package (0x06)
{
0x0BB8,
0xF35F,
0x0A,
0x0A,
0x1E00,
0x1E00
},
Package (0x06)
{
0x0B54,
0xE884,
0x0A,
0x0A,
0x1D00,
0x1D00
},
Package (0x06)
{
0x0AF0,
0xDDDD,
0x0A,
0x0A,
0x1C00,
0x1C00
},
Package (0x06)
{
0x0A8C,
0xD36A,
0x0A,
0x0A,
0x1B00,
0x1B00
},
Package (0x06)
{
0x0A28,
0xC92B,
0x0A,
0x0A,
0x1A00,
0x1A00
},
Package (0x06)
{
0x09C4,
0xBF1F,
0x0A,
0x0A,
0x1900,
0x1900
},
Package (0x06)
{
0x0960,
0xB546,
0x0A,
0x0A,
0x1800,
0x1800
},
Package (0x06)
{
0x08FC,
0xAB9F,
0x0A,
0x0A,
0x1700,
0x1700
},
Package (0x06)
{
0x0898,
0xA229,
0x0A,
0x0A,
0x1600,
0x1600
},
Package (0x06)
{
0x0834,
0x98E6,
0x0A,
0x0A,
0x1500,
0x1500
},
Package (0x06)
{
0x07D0,
0x8FD3,
0x0A,
0x0A,
0x1400,
0x1400
},
Package (0x06)
{
0x076C,
0x86F1,
0x0A,
0x0A,
0x1300,
0x1300
},
Package (0x06)
{
0x0708,
0x7E3F,
0x0A,
0x0A,
0x1200,
0x1200
},
Package (0x06)
{
0x06A4,
0x75BD,
0x0A,
0x0A,
0x1100,
0x1100
},
Package (0x06)
{
0x0640,
0x6D6A,
0x0A,
0x0A,
0x1000,
0x1000
},
Package (0x06)
{
0x05DC,
Zero,
0x0A,
0x0A,
0x0F00,
0x0F00
},
Package (0x06)
{
0x0578,
Zero,
0x0A,
0x0A,
0x0E00,
0x0E00
},
Package (0x06)
{
0x0514,
Zero,
0x0A,
0x0A,
0x0D00,
0x0D00
},
Package (0x06)
{
0x04B0,
Zero,
0x0A,
0x0A,
0x0C00,
0x0C00
},
Package (0x06)
{
0x044C,
Zero,
0x0A,
0x0A,
0x0B00,
0x0B00
},
Package (0x06)
{
0x03E8,
Zero,
0x0A,
0x0A,
0x0A00,
0x0A00
},
Package (0x06)
{
0x0384,
Zero,
0x0A,
0x0A,
0x0900,
0x0900
},
Package (0x06)
{
0x0320,
Zero,
0x0A,
0x0A,
0x0800,
0x0800
}
})
Method (ACST, 0, NotSerialized)
{
Store ("CPU0 C-States : 13", Debug)
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
Zero,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x03,
0xCD,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000020, // Address
0x03, // Access Size
)
},
0x06,
0xF5,
0x015E
}
})
}
Method (_DSM, 4, NotSerialized)
{
If (LEqual (Arg2, Zero))
{
Return (Buffer (One)
{
0x03
})
}
Return (Package (0x02)
{
"plugin-type",
One
})
}
}
Scope (_PR.CPU1) { Method (APSS, 0, NotSerialized) { Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Store ("CPU1 C-States : 7", Debug)
Return (Package (0x05)
{
One,
0x03,
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000000, // Address
0x01, // Access Size
)
},
One,
0x03E8,
0x03E8
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000010, // Address
0x03, // Access Size
)
},
0x02,
0x94,
0x01F4
},
Package (0x04)
{
ResourceTemplate ()
{
Register (FFixedHW,
0x01, // Bit Width
0x02, // Bit Offset
0x0000000000000030, // Address
0x03, // Access Size
)
},
0x03,
0xC6,
0xC8
}
})
}
}
Scope (_PR.CPU2) { Method (APSS, 0, NotSerialized) { Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (_PR.CPU3) { Method (APSS, 0, NotSerialized) { Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (_PR.CPU4) { Method (APSS, 0, NotSerialized) { Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (_PR.CPU5) { Method (APSS, 0, NotSerialized) { Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (_PR.CPU6) { Method (APSS, 0, NotSerialized) { Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
}
Scope (_PR.CPU7) { Method (APSS, 0, NotSerialized) { Return (_PR.CPU0.APSS) }
Method (ACST, 0, NotSerialized)
{
Return (\_PR.CPU1.ACST ())
}
} }
This is ok or not?
I now hew this message: kernel[0]: X86PlatformPlugin::setRingTable - AICPM failed to load ring table with status 0x0: Get=0, Load=0, Install=0 kernel[0]: X86PlatformPlugin::configResourceHandler - Failed to set ring table! kernel[0]: "Kernel-__SYMTAB" not a kext
You are almost there. Again. Just ignore this message: kernel[0]: "Kernel-__SYMTAB" not a kext
About the ring table errors. You are now using a Macmini6.2 SMBIOS with board-id Mac-F65AE981FFA204ED (hopefully) and thus now you have to check a file with:
open /S/L/Extensions/IOPlatformPluginFamily.kext/C/P/X86PlatformPlugin.kext/C/R/F65AE981FFA204ED.plist
Do you have a property (Array) with "ringFreqTables" in this plist? If yes then rename "ringFreqTable" to something like "ringFreqTableBackup" and do a: sudo touch /S/L_/Extensions After this you reboot and check the result.
My results from P-State is 16,22,29,35,38,39
Please, answer my question about "ringFreqTables".
Thi si my "ringFreqTables"
<array>
<array>
<dict>
<key>gtFreq</key>
<integer>700</integer>
<key>ringFreq</key>
<integer>1100</integer>
</dict>
<dict>
<key>gtFreq</key>
<integer>750</integer>
<key>ringFreq</key>
<integer>1100</integer>
</dict>
<dict>
<key>gtFreq</key>
<integer>800</integer>
<key>ringFreq</key>
<integer>1200</integer>
</dict>
<dict>
<key>gtFreq</key>
<integer>850</integer>
<key>ringFreq</key>
<integer>1300</integer>
</dict>
<dict>
<key>gtFreq</key>
<integer>900</integer>
<key>ringFreq</key>
<integer>1600</integer>
</dict>
<dict>
<key>gtFreq</key>
<integer>950</integer>
<key>ringFreq</key>
<integer>1700</integer>
</dict>
<dict>
<key>gtFreq</key>
<integer>1000</integer>
<key>ringFreq</key>
<integer>1800</integer>
</dict>
<dict>
<key>gtFreq</key>
<integer>1050</integer>
<key>ringFreq</key>
<integer>1900</integer>
</dict>
<dict>
<key>gtFreq</key>
<integer>1100</integer>
<key>ringFreq</key>
<integer>2000</integer>
</dict>
<dict>
<key>gtFreq</key>
<integer>1150</integer>
<key>ringFreq</key>
<integer>2100</integer>
</dict>
<dict>
<key>gtFreq</key>
<integer>1200</integer>
<key>ringFreq</key>
<integer>2200</integer>
</dict>
<dict>
<key>gtFreq</key>
<integer>1250</integer>
<key>ringFreq</key>
<integer>2300</integer>
</dict>
<dict>
<key>gtFreq</key>
<integer>1300</integer>
<key>ringFreq</key>
<integer>2300</integer>
</dict>
</array>
</array>
</dict>
Just say yes or no. All the extra text makes it unreadable. Are the errors gone now? Did you remove this "ringFreqTables" property?
Yes.I rename to ringFreqTables_backup. kernel[0]: Darwin Kernel Version 13.1.0: Thu Jan 16 19:40:37 PST 2014; root:xnu-2422.90.20~2/RELEASE_X86_64 kernel[0]: X86PlatformShim::sendStepper - Stepper dictionary from plist is NULL! kernel[0]: X86PlatformShim::start - Failed to send stepper kernel[0]: IOPPF: AppleIntelCPUPowerManagement mode
Pike why don't fix this problem on ssdtPRGen and mach_kernel?
I am more than willing to fix this, but I can only fix something when I know what the problem is, and when someone else can reproduce said problem.
But there is more. You used several different versions of OS X, both in XCPM and IOPPF power management mode, with several different SMBIOS setups, which makes it extremely difficult to fix. That is if there is anything to fix, because it may as well be caused by some third party kext.
The good news is that mackonsti opened another issues on Github, so now I can start comparing things.
PM kernel[0]: IOPPF: XCPM mode PM kernel[0]: XCPM: P-state table mismatch (error:0x11) PM kernel[0]: X86PlatformShim::sendPStates - pmCPUControl (XCPMIO_SETPSTATETABLE) returned 0x11 PM kernel[0]: X86PlatformShim::start - Failed to send PStates PM kernel[0]: X86PlatformShim::start - Failed to send stepper