Merge Updates on VTargetGen & InvSyn

[zhanghongce]

Major Updates:

• RelChc method for invariant synthesis
• support keep-for-invariants for the Verilog monitors
• some bug fix on VTargetGen

[Bo-Yuan-Huang]

Here is an overview of what got changed by this pull request:

Clones added
============
- include/ilang/vtarget-out/vtarget_gen_relchc.h  8
- src/vtarget-out/vtarget_gen_relchc.cc  11
- src/vtarget-out/inv-syn/vtarget_gen_inv_chc.cc  3
- src/vtarget-out/inv-syn/vtarget_gen_inv_abc.cc  4
- src/vtarget-out/vtarget_gen_yosys.cc  5
- src/vtarget-out/vtarget_gen_cosa.cc  2
- src/vtarget-out/vtarget_gen_impl.cc  2
- src/vtarget-out/single_target.cc  1
- src/vtarget-out/single_target_inv_syn_support.cc  2

See the complete overview on Codacy