Closed Bo-Yuan-Huang closed 3 years ago
Describe the bug Valid condition of the host ILA should be checked for executing an instruction.
To Reproduce N/A
Environment (please complete the following information): N/A
Additional context To conjunct across the hierarchy for consistency with Verilog verification target generation.
Check valid conditions here
https://github.com/Bo-Yuan-Huang/ILAng/blob/7e99ccf4e9018c62f9e50cc136827b61855ec174/src/target-sc/ilator.cc#L462-L463
Define valid conditions around here
https://github.com/Bo-Yuan-Huang/ILAng/blob/7e99ccf4e9018c62f9e50cc136827b61855ec174/src/target-sc/ilator.cc#L78-L83
Describe the bug Valid condition of the host ILA should be checked for executing an instruction.
To Reproduce N/A
Environment (please complete the following information): N/A
Additional context To conjunct across the hierarchy for consistency with Verilog verification target generation.