Easier Bitstream Debug - Githubissues

PrincetonUniversity / prga

Open-source FPGA research and prototyping framework.

http://parallel.princeton.edu/prga/

BSD 3-Clause "New" or "Revised" License

195 stars 25 forks source link

Closed angl-dev closed 3 years ago

angl-dev commented 3 years ago

Extend magic programming circuitry to generate a Verilog file for verifying bitstream loading results.

angl-dev commented 3 years ago

Done with the latest release (0.3.5).