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PyFPGA / openflow

A Python library, and CLI utilities, which solves HDL-to-bitstream based on FOSS.
GNU General Public License v3.0
3 stars 1 forks source link

Try to implement mixed languages for synthesis (VHDL+Verilog) #1

Open rodrigomelo9 opened 3 years ago

rodrigomelo9 commented 3 years ago

https://github.com/im-tomu/fomu-workshop/blob/master/mixed-hdl/blink/Makefile