fix: :bug: merge pr and fix struct statement

PyHDI / Pyverilog

Python-based Hardware Design Processing Toolkit for Verilog HDL

Apache License 2.0

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Closed Crescentm closed 1 week ago

Crescentm commented 1 week ago

merge PR#130, PR#120, PR#119, PR#103, PR#103

Crescentm commented 1 week ago

Sorry, I made a mistake. I submitted this PR to the wrong repository.