I have a basic question here with a simplified circuit. I do not understand why the switch is working in one test circuit but not in the other and I would appreciate any help that anyone might be able to offer for why this is. I don't know if this is a problem with PySpice or NgSpice, but when I put this circuit into LT spice it works exactly like it should with both switches turning on any time the gate drive crosses the Vth. Thank you for any insights.
Here is my python code:
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import matplotlib.pyplot as plt
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import PySpice.Logging.Logging as Logging
logger = Logging.setup_logging()
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from PySpice.Doc.ExampleTools import find_libraries
from PySpice.Probe.Plot import plot
from PySpice.Spice.Library import SpiceLibrary
from PySpice.Spice.Netlist import Circuit
from PySpice.Unit import *
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from PySpice.Spice.NgSpice.Shared import NgSpiceShared
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libraries_path = find_libraries()
spice_library = SpiceLibrary(libraries_path)
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circuit = Circuit('Stator Drive')
I have a basic question here with a simplified circuit. I do not understand why the switch is working in one test circuit but not in the other and I would appreciate any help that anyone might be able to offer for why this is. I don't know if this is a problem with PySpice or NgSpice, but when I put this circuit into LT spice it works exactly like it should with both switches turning on any time the gate drive crosses the Vth. Thank you for any insights.
Here is my python code: #################################################################################################### import matplotlib.pyplot as plt #################################################################################################### import PySpice.Logging.Logging as Logging logger = Logging.setup_logging() #################################################################################################### from PySpice.Doc.ExampleTools import find_libraries from PySpice.Probe.Plot import plot from PySpice.Spice.Library import SpiceLibrary from PySpice.Spice.Netlist import Circuit from PySpice.Unit import * #################################################################################################### from PySpice.Spice.NgSpice.Shared import NgSpiceShared #################################################################################################### libraries_path = find_libraries() spice_library = SpiceLibrary(libraries_path) #################################################################################################### circuit = Circuit('Stator Drive')
circuit.include(spice_library['test_netlist'])
Top level circuit annotated as "x1"
circuit.X(1,'test_netlist', 'gate_drive1', 'sw_node_hs1', 'gate_drive2', 'sw_node_hs2')
simulator = circuit.simulator(temperature=25, nominal_temperature=25) analysis = simulator.transient(step_time=.005E-6, start_time=1E-3, end_time=3.5E-3, use_initial_condition=False)
NUMBER_PLOTS = '4'
plots of circuit components
figure = plt.figure(1, (10, 5)) plot1 = plt.subplot(int(NUMBER_PLOTS+'11')) plot(analysis.gate_drive1) plt.legend(('gate drive 1 [V]', '',''), loc=(.8,.8)) plt.grid() plt.xlabel('t [s]') plt.ylabel('[V]') plot2 = plt.subplot(int(NUMBER_PLOTS+'12')) plot(analysis.sw_node_hs1) plt.legend(('Switch Node 1',''), loc=(.05,.1)) plt.grid() plt.xlabel('t [s]') plt.ylabel('[V]') plot3 = plt.subplot(int(NUMBER_PLOTS+'13')) plot(analysis.gate_drive2) plt.grid() plt.xlabel('t [s]') plt.ylabel('[V]') plt.legend(('gate drive 2',''), loc=(.05,.1)) plot4 = plt.subplot(int(NUMBER_PLOTS+'14')) plot(analysis.sw_node_hs2) plt.grid() plt.xlabel('t [s]') plt.ylabel('[V]') plt.legend(('sw node 2',''), loc=(.05,.1)) plt.tight_layout() plt.show()
And here is the netlist:
.subckt test_netlist gate_drive1 sw_node_hs1 gate_drive2 sw_node_hs2 XX1 gate_drive1 sw_node_hs1 gate_drive2 sw_node_hs2 .ends test_netlist
.subckt test_netlist gate_drive1 sw_node_hs1 gate_drive2 sw_node_hs2
Test circuit 1 V1 N200 0 100 R1 N200 sw_node_hs1 1 S1 sw_node_hs1 0 gate_drive1 0 myswitch V2 N102 0 PULSE(0 10 0 1n 1n 50u 100u 200) B2 gate_drive1 0 V=V(N102) *output load R23 0 sw_node_hs1 1
Test circuit 2 V3 N201 0 100 R3 N201 sw_node_hs2 1 S5 sw_node_hs2 0 gate_drive2 0 myswitch V4 N101 0 PULSE(0 10 0 50u 50u 1n 100u 200) B1 gate_drive2 0 V=V(N101) *output load R26 0 sw_node_hs2 1 .model myswitch SW(Ron=0.002 Roff=1000000 Vt=3.0) .ends test_netlist