jakelishman
commented
1 year ago I'm sorry that this issue never had any attention at the time. For what it's worth, Qiskit's model is that gate names ('x', 'u3', etc) are like machine opcodes - 'x' isn't some type of 'u3', it's a different instruction that hardware may or may not implement, even though mathematically in a particular case it can correspond to the same thing. One of the jobs of the transpiler is to resolve these mathematical equivalences into sequences of opcodes that the underlying machine actually supports.
This is why the noise model needs to be defined in terms of the named operations that are actually in use; the noise characteristics of a machine running a u3 instruction might be quite different to the same machine running an x, since the former is an arbitrarily parametrised instruction and the latter is not.
At any rate, this is actually a discussion that relates to Qiskit Aer, and may also receive more attention if asked in our support Slack channel (https://qisk.it/join-slack). I'll close this issue now as it's long stale, but please feel free to follow up on one of those two channels if there are more questions.
I was exploring Noise Modelling and them to the Vigo_simulator and came across a problem and hope you can help me or at least explain what's going on.
My goals was to explore the different errors, in particular bit flip errors (e.g. from resets and wrong measuring) of circuits with many gates, somewhat like 50+ gates for a 4 qubit system. Therefore I made sure the gates will add up to just a identity
operator, for example 0000 -> 0000.
I did this by just applying X, Y and Z gates and then used the vigo simulator and found the results a bit confusing. I made sure I only used optimization level=0 when executing the circuit, so the circuits wont be optimized. like deleting gates, if they add up to an identity operation.
Problem 1: When defining the the quantum bit errors and applying them to every u1, u2, u3 gate then the error shoould also be applied to the X, Y and Z gates since they're at least in the set of u3 gates
########### Code Example: noise_bit_flip.add_all_qubit_quantum_error(error_gate1, ["u1", "u2", "u3"]) # errro_gate1 =/= 0, checked that many times ###########
But apparently this is not the case, instead one has to define X, Y and Z gates in terms of u1, u2, u3 gates and then the noise is applied to the gates.
Problem 2:
Then I tried a different approach:
circ_2 is a circuit of only many X, Y, Z gates, followed by a Hadarmard and some cx gates to create an entangeled state circ_3 is a circuit of only many X, Y, Z gates - but defined as u gates- followed by a Hadarmard and some cx gates to create an entangeled state (see attached pictures)
With the code below I then get 2 different results, just using the Virgo simulator
3b and 3c show a similar output and 3a is obviously optimized in some way, despite using optimization_level=0
########## Code Example
Vigo Simulation
job_vigo_3a = execute(circ_2, VigoSim, basis_gates=['x', 'y', 'z', 'h', 'cx'], optimization_level=0) job_vigo_3b = execute(circ_2, VigoSim, optimization_level=0) job_vigo_3c = execute(circ_3, VigoSim, optimization_level=0)
##########
I have attached the pictures of the circuits c2 and c3 and also the results of the vigo simulation (They're mixed with my own noise model from a jupyter notebook, you can just ignore the first 3 labels)
yellow = 3a, orange = 3b blue = 3c
Maybe someone has an idea what's going on or if this strange behaviour is due to my lack of understanding the qiskit package. I even worked through some of the source code of qiskit and found that there possibly might be a issue by using the label as a definition of the gate ('x', 'y' , 'cx') and I also found no "is_in_a_specific_set_of_gates_relation" inside the gate class which might be of use in this case to avoid the problem .