Closed jakelishman closed 4 weeks ago
One or more of the following people are relevant to this code:
@Cryoris
@Qiskit/terra-core
@ajavadia
@kevinhartman
@mtreinish
Files with Coverage Reduction | New Missed Lines | % | ||
---|---|---|---|---|
qiskit/transpiler/passes/synthesis/unitary_synthesis.py | 2 | 88.43% | ||
crates/qasm2/src/lex.rs | 4 | 92.48% | ||
crates/circuit/src/packed_instruction.rs | 4 | 95.19% | ||
crates/circuit/src/dag_circuit.rs | 6 | 88.63% | ||
qiskit/synthesis/two_qubit/xx_decompose/decomposer.py | 6 | 90.84% | ||
<!-- | Total: | 22 | --> |
Totals | |
---|---|
Change from base Build 10640280384: | -0.01% |
Covered Lines: | 71824 |
Relevant Lines: | 80580 |
Summary
The
mutable
check in the controlled-gateOperationFromPython
extraction logic to check for a mutatedbase_gate
was overzealous, and would return false positives for parametric controlled gates. The only modification tobase_gate
of a standard-library gate that would not have caused data-model problems from Python space would be setting the base-gate label, which is used for a public feature of the circuit visualisers.The change to
get_standard_gate_name_mapping
is just a minor convenience to make the gate objects directly appendable to a circuit; previously, eachParameter
object was distinct and had a UUID clash with others of the same name, so could not be used together. The new behaviour is purely a convenience for tests; it largely should not be useful for users to directly append these gates.Details and comments