Qiskit / qiskit

Qiskit is an open-source SDK for working with quantum computers at the level of extended quantum circuits, operators, and primitives.
https://www.ibm.com/quantum/qiskit
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HighLevelSynthesis Failure #13152

Open glanzz opened 3 days ago

glanzz commented 3 days ago

Environment

What is happening?

HighLevelSynthesis pass fails on when transpiling circuit with QFTGate's inverse.

How can we reproduce the issue?

from qiskit.transpiler.preset_passmanagers import generate_preset_pass_manager
from qiskit_ibm_runtime.fake_provider import FakeSherbrooke
from qiskit.circuit.library import QFTGate

from qiskit import QuantumCircuit

qft = QFTGate(1)

qc = QuantumCircuit(1)
qc.h(0)
qc.sx(0)
qc.z(0)
qc.append(qft.inverse(), [0])
qc.z(0)
qc.sxdg(0)

qc.measure_all()

backend = FakeSherbrooke()
pass_manager=generate_preset_pass_manager(backend=backend, optimization_level=3, **{'layout_method': 'trivial', 'routing_method': 'stochastic', 'translation_method': 'synthesis'})
transpiled_circuit = pass_manager.run(qc)

What should happen?

Transpiler Error:

qiskit.transpiler.exceptions.TranspilerError: "HighLevelSynthesis was unable to synthesize Instruction(name='u', num_qubits=1, num_clbits=0, params=[1.5707963267948966, 0.0, 3.141592653589793])."

Any suggestions?

No response

alexanderivrii commented 2 days ago

Thank you for opening this issue! Having looked at it very briefly (so far), your code sets the option 'translation_method': 'synthesis', yet no basis_gates is provided. I am not completely sure what should be the correct output in such a case.

But, for instance, the following code

backend = FakeSherbrooke()
pass_manager=generate_preset_pass_manager(backend=backend, optimization_level=3, translation_method='synthesis', basis_gates=['u', 'cx'])
transpiled_circuit = pass_manager.run(qc)

runs fine.

glanzz commented 2 days ago

According to the documentation, the basis gate is derived from backend and unless a value for basis gate is explicitly provided. Since, the backend is given as a parameter, I was expecting the basis gates to be derived from it.

Screenshot 2024-09-16 at 10 25 14 AM