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QuEraComputing / UnitDiskMapping.jl

Reduce several arbitrary-connectivity optimization problems into maximum independent set problems on a grid
https://github.com/QuEraComputing/UnitDiskMapping.jl
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AND gate #44

Closed bsiegelwax closed 2 months ago

bsiegelwax commented 1 year ago

The AND gate is too short as drawn and generates a y spacing error. The simulator doesn't catch it, but Aquila does.

neutral atom Toffoli

4 post-processed

notebooks/tutorial.jl

GiggleLiu commented 1 year ago

Hi thanks for the issue. I did not get it, do you have any suggested change?

bsiegelwax commented 1 year ago

The node between x1 and y1 has to be farther from y1 or it's easy to get a y spacing error on Aquila.

GiggleLiu commented 1 year ago

Sorry, I am not familiar with the spacing error on Aquila. Is there anything I can help to fix this issue?

bsiegelwax commented 1 year ago

That's why I opened an issue. The AND gate, as described in UnitDiskMapping.jl, generates a y spacing error if actually run on Aquila.

johnzl-777 commented 1 year ago

Hi @bsiegelwax could you provide a code snippet on how you're taking the gate and putting it on Aquila?

bsiegelwax commented 1 year ago

I'm using QuEra's MIS code. But, when you arrange the atoms as shown, you may get a y spacing error. I did. I resolved it by increasing the y spacing.