Parameters are not visible from analog functions

[kulikov309]

Hi ADMS developers,

I'm trying to read module parameters from analog functions and get a parsing error: [fatal..] [./test.va:17:17]: at 'p1': [fatal..] identifier never declared

Below is my Verilog-A file:

`include "discipline.h"

module mymodule (p,q);
electrical p,q;

parameter real p1 = 1.0;
parameter real p2 = 2.0;
parameter real p3 = 3.0;

  analog   function real f1;
    input x;
    begin
      //works
      //f1 = x * 1.0;
      //doesn't work. p1 is not visible from f1
      f1 =  x * p1; 
    end
  endfunction

analog
  begin
    real c;
    c = f1(5.0) + p2*p3;
    I(p,q) <+ c;
  end
endmodule

[ngwood]

I recently noticed this myself. This feature first appeared in VAMS-LRM-2.3.