Closed ra3xdh closed 9 years ago
There are a couple of issues.
QucsMain->schNameHash.value(baseName)
does not exist from the command line. QucsMain is not launched yet. A simple if (QucsMain)
guard to skip the hash access guard allow the schematic to be printed...Subcircuit::getSubcircuitFile()
is failing return its absolute (or even relative) path. So it cannot be loaded.Workaround: If the command is run from inside the project directory, which contains the parent schematic and the subcircuit, things seem to work fine. Both the netlist and print functions.
cd testsuite/AC_bandpass_prj/
/path_to_builddir/qucs -n -i bandpass.sch -o test_bandpass.txt
/path_to_builddir/qucs -p -i bandpass.sch -o bandpass.pdf
With PR #351 following should work
qucs -n -i t foo.sch -o netlist.txt
Or running all the qucs-test examples:
python run.py --prefix /home/user/local/qucs --qucs
I did not test schematics with components including Verilog/VHDL textual models. QUCSDIR might need to be set to a installed version of Qucs in order to use qucsconv (for spicefile components) and library components.
Bug presents in
master
branchSteps to reproduce
master
branch, Linux platformqucs-test
suite:There is a problem with
QucsMain->schNameHash
calculation. From GUI this circuit could be opened normally.