QuickLogic-Corp / quicklogic-fpga-toolchain

Open Source FPGA toolchain and documentation for QuickLogic devices and eFPGA IP
https://quicklogic-quicklogic-fpga-toolchain.readthedocs-hosted.com/en/latest/index.html
Apache License 2.0
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Building docker fails #54

Open whatnick opened 3 years ago

whatnick commented 3 years ago

Attempting to build docker locally with :

docker build . -t symbiflow-ql-slim-buster

Fails with :

4.3.2. Analyzing design hierarchy..
ERROR: Module `qlal4s3b_cell_macro' referenced in module `top' in cell `u_qlal4s3b_cell_macro' does not have a port named 'Sys_Clk0'.
make[3]: *** [quicklogic/pp3/tests/counter/CMakeFiles/file_quicklogic_pp3_tests_counter_counter-ql-chandalar_ql-s3-ql-eos-s3-virt-ql-eos-s3-wlcsp_top.eblif.dir/build.make:84: quicklogic/pp3/tests/counter/counter-ql-chandalar/ql-s3-ql-eos-s3-virt-ql-eos-s3-wlcsp/top_synth.json] Error 1
make[2]: *** [CMakeFiles/Makefile2:292322: quicklogic/pp3/tests/counter/CMakeFiles/file_quicklogic_pp3_tests_counter_counter-ql-chandalar_ql-s3-ql-eos-s3-virt-ql-eos-s3-wlcsp_top.eblif.dir/all] Error 2
make[1]: *** [CMakeFiles/Makefile2:271253: quicklogic/pp3/tests/CMakeFiles/all_quick_tests.dir/rule] Error 2
make: *** [Makefile:218: quicklogic/pp3/tests/CMakeFiles/all_quick_tests.dir/rule] Error 2
charkster commented 3 years ago

I'm seeing this too. Looks like the is techmap is out-of-date. I compared with qlal4s3b_cell_macro in my x86_64 build and it has the Sys_Clk0 port.

I needed to replace these files with the x86_64 install version (and was able to get it resolved): symbiflow/quicklogic-arch-defs/share/techmaps/quicklogic/pp3/techmap/cells_map.v symbiflow/share/yosys/quicklogic/pp3_cells_sim.v symbiflow/share/yosys/quicklogic/pp3_cells_map. quicklogic-yosys/techlibs/quicklogic/pp3_cells_sim.v quicklogic-yosys/techlibs/quicklogic/pp3_cells_map.v quicklogic-yosys/share/quicklogic/pp3_cells_sim.v quicklogic-yosys/share/quicklogic/pp3_cells_map.v