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Bumps third_party/litex from
c401bdd
to5c92232
.Commits
5c92232
test/test_cpu: Disable NeoRV32 in CI (Seems to be broken with Verilator update).556c8a7
tools/litex_sim: Rename with-bist args to --with-sdram-bist.13fcbca
Merge pull request #1560 from antmicro/msieron/sdram-hw-test406fd92
Merge pull request #1575 from antmicro/mdudek/fix_verilator_build1610c64
cpu/vexriscv_smp/core: Take into account wishbone_force_32b No Direct Memory ...fd59e8d
liblitedram/bist: fix printf format warnings4552b88
Add missing package that caused verilator build to fail73b88c6
Merge pull request #1574 from antmicro/msieron/fix-format-warningsf60e171
ci: Specify verilator sha1 (Build broken with recent versions).89f60e6
liblitedram/utils: fix format warningsDependabot will resolve any conflicts with this PR as long as you don't alter it yourself. You can also trigger a rebase manually by commenting
@dependabot rebase
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