Scheduler produces bogus machine code

[Quuxplusone]

Bugzilla Link	PR11902
Status	NEW
Importance	P enhancement
Reported by	Anton Korobeynikov (anton@korobeynikov.info)
Reported on	2012-02-01 04:34:24 -0800
Last modified on	2012-08-04 08:26:33 -0700
Version	trunk
Hardware	PC All
CC	atrick@apple.com, llvm-bugs@lists.llvm.org, stoklund@2pi.dk
Fixed by commit(s)
Attachments	scheduler.ll (5138 bytes, application/octet-stream)
Blocks
Blocked by
See also

Created attachment 7980
Testcase

Consider the attached .ll file.

If one will feed it to llc -arm-enable-ehabi then one will see that the .vsave
entry contains spurious s18 register added to the register list. This is
because post-ra scheduler adds bogus s18 impdef operand to VSTMDDB_UPD. Adding -
disable-post-ra fixes this problem.

I can surely ignore imp-def operands in the ARM unwinding stuff emitter. But I
think this is a symptom of some bug inside the scheduler or some passes around
(I must admit, I have another testcase which is fails w/o -disable-post-ra and
passes otherwise, but I failed to reduce it yet since it's several KLOCs of
heavy vector NEON code).

[Quuxplusone]

Attached scheduler.ll (5138 bytes, application/octet-stream): Testcase

[Quuxplusone]

Workaround implemented in r161301, though bug in scheduler does still exist.